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UCSBarchlab / OpenTPU Public

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Output to verilog#11

Open

herbelinluke wants to merge 6 commits intoUCSBarchlab:masterUCSBarchlab/OpenTPU:masterfrom

herbelinluke:output_to_verilogherbelinluke/OpenTPU:output_to_verilogCopy head branch name to clipboard

Conversation Commits6 (6)Checks Files changed

Open

Output to verilog#11
herbelinluke wants to merge 6 commits intoUCSBarchlab:masterfrom
herbelinluke:output_to_verilog

Commits

Commits on Jan 19, 2026

updated a small error using nonimported helperfuncs instead of pyrtl signed_mult
herbelinluke
committed
updated tpu.py to have IO names instead of tmp for pyrtl verilog output
herbelinluke
committed
ignore file
herbelinluke
committed
pushing the rest of stuff
herbelinluke
committed

Commits on Jan 20, 2026

pushing some verilog files
herbelinluke
committed
cleaned up so diff is only relevant things
herbelinluke
committed

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