This project implements a 4-bit Arithmetic Logic Unit (ALU) in Verilog, designed to perform basic arithmetic and logical operations. The project also includes a SPICE netlist for simulation and verification of the ALU's behavior.
-
Arithmetic Operations
- 4-bit addition
- 4-bit subtraction
-
Logical Operations
- NAND
- XOR
-
Outputs
- 4-bit result
- Carry-out for addition
- Borrow-out for subtraction
- File:
4BitALU.v - Description: Verilog module implementing the 4-bit ALU, with 2-bit selection lines to control the operation and dedicated outputs for carry and borrow.
- File:
4bitalu.netlist.cir - Description: SPICE netlist describing the transistor-level implementation of the 4-bit ALU for circuit simulation.
- Use any Verilog simulation tool such as ModelSim or Xilinx Vivado.
- Simulate the
ALUmodule with various input combinations to verify its functionality.
- Use any SPICE simulation software (e.g., LTSpice, HSPICE).
- Load the
.cirfile to analyze the circuit's behavior at the transistor level.
- Inputs:
A[3:0]: First 4-bit operandB[3:0]: Second 4-bit operandsel[1:0]: Operation selector
- Outputs:
result[3:0]: Result of the selected operationcarry_out: Carry-out for additionborrow_out: Borrow-out for subtraction
- Includes subcircuits for essential components like inverters and full adders.
- Defines the transistor-level design of the 4-bit ALU.
- Modify the testbench to test specific operations.
- Use waveform viewers to verify signal transitions and output correctness.
- Run transient and DC analyses to observe the circuit's behavior over time.
- Validate the outputs of the ALU against expected results.
- Add more operations, such as AND, OR,Comparator and bit-shifting.
- Optimize transistor-level design for power and area efficiency.
This project showcases a detailed implementation of a fundamental digital component used in microprocessors. The design demonstrates both the logical and hardware-level aspects of a 4-bit ALU.