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UAE JIT Status
akadata edited this page Feb 14, 2026
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1 revision
This page tracks the current bring-up state of the optional UAE JIT backend in
pistorm64.
Current headline status:
- JIT integration work is in progress.
- It is not yet a stable/reliable normal runtime path.
- Use Musashi (non-JIT) for production/regular operation.
- This is a CPU backend integration, not a full UAE/Amiberry frontend port.
- Goal: keep PiStorm memory/platform code (
src/platforms/amiga/*,src/memory_mapped.c) and use UAE JIT only for CPU execution.
Current build path:
make USE_UAE_JIT=1 uae-jitOpcode generation inputs now live in-tree:
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src/uae/gen/table68kis the authoritative opcode specification input. -
src/uae/gencpu.cppandsrc/uae/jit/gencomp.cppare the authoritative generators forcpuemu_*.cpp,cpustbl.cpp, and JITcompstbl.cpp.
To regenerate the opcode outputs, run:
make uae-opcodesThis builds the host generators under build/uae/gen/ and emits refreshed
cpuemu_*.cpp, cpustbl.cpp, and cputbl.h in src/uae/, plus compemu.cpp,
compstbl.cpp, and comptbl.h in src/uae/jit/.
Notes:
-
uae-jitis incremental. It rebuilds only changed files and then linksemulatorif needed. - If link state looks stale, run:
make clean
make USE_UAE_JIT=1 uae-jit-
build/uae/libuae.ais built and linked. - UAE bridge/stub objects are linked from source (
src/uae/pistorm_uae_bridge.cc,src/uae/pistorm_uae_stubs.cc). - Reset vector read is now observed as valid in JIT mode:
Read PC from address 4 : 0x00F800D2[UAE] reset vectors: SP=11144EF9 PC=00F800D2
- JIT starts and allocates translation cache:
Actual translation cache size : 32768 KB
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m68k_pc_indirectnow reports enabled in JIT path:[Core1] Emulation mode 1 m68k_pc_indirect 1
-
OVL:0appears shortly after startup and execution does not yet progress to a stable Workbench boot under JIT. - Z2 autoconfig probing under JIT produces high-volume warnings like:
Unexpected WORD read from Z2 autoconf addr ...
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68060is not accepted by current parser/tables and falls back:Invalid CPU type 68060 specified, defaulting to 68000.
-
BAD JIT opcodes listentries (e.g.DIVL,SUBX) are expected fallback markers, not by themselves a fatal error.
- Chip RAM lives on the Amiga side (Agnus/8372A). Do not map Pi-side RAM as chip RAM unless you are explicitly faking it for controlled tests.
- Do not place "chipram" at
$00C00000for this path. - Keep Kickstart ROM at
$00F80000and let reset overlay force vectors at low memory during reset. -
$00C00000is trapdoor/slow expansion territory on A500-class mapping, not primary chip RAM.
-
Reference source: Z3660_emu (from
z3660/.../Z3660_emu/src/uae) is the canonical reference set for this integration. Oursrc/uaetree matches that file list exactly. -
Amiberry/WinUAE extras: Amiberry ships additional CPU emulation tables and
helpers (
cpuemu_20..35,cpuemu_50,cpummu*.cpp,cpu_thread.cpp,cpuboard.cpp, etc.) that are not present in Z3660_emu. These are not required for the current JIT bring-up path, but should be evaluated if we decide to expand beyond the Z3660_emu feature envelope. - A9/Z-TURN features: Z-TURN platform specifics (e.g. A9 GIC, XGpioPs, Zynq MMU wiring) must remain excluded from PiStorm64. Keep the UAE core free of those platform dependencies and continue to route all bus/memory via the PiStorm bridge.
PISTORM_ENABLE_QUEUE=0 ./emulator --jitIf the system drops to OVL:0 too early (yellow screen flashing white) try
delaying the first overlay drop with:
PISTORM_UAE_OVL_HOLDOFF=1 PISTORM_ENABLE_QUEUE=0 ./emulator --jitIncrease the holdoff count if needed (each count defers one OVL:0 request).
Keep initial tests minimal (ROM + chipram + platform) before re-adding Z2/Z3, RTG, PiSCSI, and A314 one by one.
- Keep overlay/vector path forced before
m68k_reset_newcpu()and verify no post-reset path drops to low unmapped fetch. - Make Z2/Z3 autoconfig handlers fully tolerant of JIT word/long accesses.
- Reduce autoconfig warning noise to debug-level once width handling is robust.
- Re-introduce platform devices incrementally and capture first failing add-on.