Uart Module

Dependancies

• Nix Package Manager
  • Windows: Recommend Using the NixOS WSL image
  • MacOS: MacOS Nix Package Manager Setup
  • Other Linux Distributions: Linux Nix Package Manager Setup

Setup

git clone [url]
cd [folder]
# This step can take a long time
# This is due to building system-c and verilator from source with clang
# It should only take a long time the first time
sh dev_shell.sh 

Usage

Note: All build artifacts will be generated in the "out" folder

Generate Verilog: make verilog

Run Tests: make test

Generate Coverage: make cov

Run Synthesis: make synth

Run STA: make sta

Integrating with Other Modules

To configure the uart, create an instance of UartParams with the desired parameters.

val uartParams = UartParams(
  dataWidth = 32,
  addressWidth = 32,
  wordWidth = 8,
  maxOutputBits = 8,
  syncDepth = 2,
  bufferSize = 1024,
  maxBaudRate = 25_000_000,
  maxClockFrequency = 25_000_000,
  coverage = true,
  verbose = true
)

Instantiating the Uart Module

Instantiate the Uart module with the defined parameters.

val uart = Module(new Uart(uartParams))

More Info

• For more infomation about how specifically the Uart module works, see the documentation
• For other modules, check out our organization
• For more info about Chisel, see their documentation