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Siavoosh Payandeh Azad edited this page Feb 20, 2019
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All the synthesis is done for 0.18 micro-m AMS library and Synopsys design vision at 200 MHz.
| Version | Sequential | Combinatorial | Total | Overhead (%) | Critical Path Delay (ns) |
|---|---|---|---|---|---|
| Baseline | 48378.7 | 42669.0 | 91047.8 | -- | 4.82 |
| CPRD Router | 52033.7 | 55129.9 | 107163.7 | 17.7 | 4.8 |
| CPDD Router | 53298.2 | 57108.4 | 110406.6 | 21.3 | 4.82 |
the power consumption of the proposed methods and the baseline architecture has been evaluated for random uniform traffic with a packet injection rate of 0.01 (without presence of attacker).
| Version | Switching (mW) | Internal (mW) | Leakage (mW) | Total (mW) | Overhead (%) |
|---|---|---|---|---|---|
| Baseline | 0.151 | 3.663 | 0.261 | 3.814 | -- |
| CPRD Router | 0.273 | 3.374 | 0.327 | 4.008 | 5% |
| CPDD Router | 0.229 | 3.820 | 0.336 | 4.050 | 6.1% |
CITE: If you use the current repository in your work please cite:
- Chaves, C.G.; Azad, S.P.; Hollstein, T.; Sepúlveda, J. DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures. J. Low Power Electron. Appl. 2019, 9, 7.