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Cherry pick of stm32c0 changes needed for full support with USB on v4.1#50

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petejohanson merged 7 commits intozmkfirmware:v4.1.0+zmk-fixesfrom
petejohanson:v4.1.0+zmk-c0-fixes
Jan 7, 2026
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Cherry pick of stm32c0 changes needed for full support with USB on v4.1#50
petejohanson merged 7 commits intozmkfirmware:v4.1.0+zmk-fixesfrom
petejohanson:v4.1.0+zmk-c0-fixes

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Zephyr 4.1 has the stm32c0 SoC definition, but didn't yet fully support USB. This Zephyr branch cherry picks the few additional changes for the HSIUSB48 clock and USB peripheral setup to support it.

marwaiehm-st and others added 7 commits December 23, 2025 19:20
Added USB device node with compatible "st,stm32-usb".
Added usb_fs_phy node with compatible "usb-nop-xceiv".

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
- Defined CCIPR2_REG offset.
- Added USB_SEL(val) macro to support USB clock selection using CCIPR2_REG.

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Selecting the clock source for USB is only a bit value in the CCIPR2
register.
See RM0490 Rev 5 chapter 6.4.21 page 159.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
STM32C071 have USB peripheral which can be clocked from HSI (HSIUSB48).

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
Allow to use internal HSI to clock the USB bus if HSE is not available.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
Allows enabling the Clock Recovery System (CRS) for HSI48 to achieve
the expected accuracy for USB transfers. Uses USB SOF packet by default.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
Implementation based on STM32G4 series.

This is a preparation to enable reading and writing the RDP bits.

Signed-off-by: Martin Jäger <martin@libre.solar>
@petejohanson petejohanson merged commit ec36516 into zmkfirmware:v4.1.0+zmk-fixes Jan 7, 2026
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4 participants