ZarhusBMC

.gitignore

@@ -3,3 +3,5 @@ customrc
 *.sw?
 .repo/
 .vscode/
+images/
+artifacts/

README.md

@@ -1,3 +1,7 @@
+# Prerequisites
+
+The documents related to `x11ssh` platform, are in `./docs/` directory.
+
 # OpenBMC
 
 [![Build Status](https://jenkins.openbmc.org/buildStatus/icon?job=latest-master)](https://jenkins.openbmc.org/job/latest-master/)

dockerfile

@@ -0,0 +1,41 @@
+# Use the latest Ubuntu image
+FROM ubuntu:latest
+
+# Set environment variables for non-interactive installs
+ENV DEBIAN_FRONTEND=noninteractive
+
+# Update and install required packages
+RUN apt-get update && apt-get install -y --no-install-recommends \
+    git \
+    gcc \
+    g++ \
+    make \
+    file \
+    wget \
+    gawk \
+    diffstat \
+    bzip2 \
+    cpio \
+    chrpath \
+    zstd \
+    lz4 \
+    python3 \
+    vim \
+    locales \
+    patch \
+    curl \
+    ca-certificates \
+ && rm -rf /var/lib/apt/lists/*
+
+# Set up locales
+RUN locale-gen en_US.UTF-8 \
+ && update-locale LANG=en_US.UTF-8
+
+ENV LANG=en_US.UTF-8
+ENV LANGUAGE=en_US:en
+ENV LC_ALL=en_US.UTF-8
+
+# Set user and the working directory inside the container
+WORKDIR /project-data
+USER ubuntu
+

docs/building_x11ssh_image.md

@@ -0,0 +1,189 @@
+# Building OpenBMC for `x11ssh` platform.
+
+This document will guide you through building OpenBMC for `x11ssh` platform.
+
+## Prerequisites
+
+### Hardware requirements
+
+To build OpenBMC you'll need solid machine. The machine with following
+configuration has been proven to be insufficient.
+
+Partial output of `fastfetch`.
+```
+CPU: 12th Gen Intel(R) Core(TM) i7-1260P (16) @ 4.70 GHz
+Memory: 10.16 GiB / 15.44 GiB (66%)
+```
+
+Building failed due to insufficient RAM memory available, even when no other
+user processes were running.
+
+## Building `x11ssh` configuration
+
+### Building docker container
+
+The image will be built inside the docker container, it should provide a
+reproducible environment with all necessary tools installed.
+
+Steps:
+1. Create docker container.
+    ```shell
+    docker build -t ubuntu-latests-openbmc .
+    ```
+1. Run the container
+    ```shell
+    ./run.sh
+    ```
+
+### Building OpenBMC image
+
+Perform following steps to build `openbmc` for x11ssh.
+
+Steps:
+1. Source setup file with `x11ssh` configuration.
+    ```shell
+    source setup x11ssh
+    ```
+1. Build the image (this will take a while)
+    ```shell
+    bitbake obmc-phosphor-image
+    ```
+    Generated image file should be inside following directory:
+    ```shell
+    ./build/x11ssh/tmp/deploy/images/x11ssh/obmc-phosphor-image-x11ssh.static.mtd
+    ```
+
+## Running the image in qemu
+
+To test if the image works, one might run it inside `qemu`.
+
+Steps:
+1. (Optional) Copy build image to local directory.
+    ```
+    mkdir images
+    cp ./build/x11ssh/tmp/deploy/images/x11ssh/obmc-phosphor-image-x11ssh.static.mtd images/
+    ```
+1. Run the built image inside qemu.
+    ```
+    ./runqemu.sh images/obmc-phosphor-image-x11ssh.static.mtd
+    ```
+    On success, you shall be greeted with login prompt.
+1. Exit qemu via key combination.
+    ```
+    CTRL+a, x
+    ```
+
+## Flashing
+
+This section describes recovery/flashing process.
+
+### Chip location and details
+
+The flash memory for BMC on `x11ssh` platform is Macronix MX25L25635F in 16-PIN
+SOP package. Documentation can be found
+[here](https://www.macronix.com/Lists/Datasheet/Attachments/8666/MX25L25635F,%203V,%20256Mb,%20v1.5.pdf).
+
+The picture below shows the chip location on the `x11ssh` motherboard, marked
+with a red circle.
+
+![motherboard](./img/mobo.jpg)
+
+Below is the detailed view of the chip. The circles highlight the dot and a
+notch used to identify pin 1 of the chip. The pin 1 is highlighted in red.
+
+![chip](./img/macronix.jpg)
+
+### Connecting RTE
+
+The image can be flashed using
+[RTE](https://shop.3mdeb.com/shop/open-source-hardware/rte/?srsltid=AfmBOoqP5uST8J6MRdp41I-dletjgiEX6e77Oa18S1fsuCWHbAFzD_jI).
+Below is the pinout of the chip.
+
+![pinout](./img/pinout.png)
+
+_Source_:
+[Macronix](https://www.macronix.com/Lists/Datasheet/Attachments/8666/MX25L25635F,%203V,%20256Mb,%20v1.5.pdf)
+
+The chip needs to be connected to the SPI header on RTE. The pinout for the
+the header is as follows.
+```text
+             ______
+         >  |      |
+Vcc 3.3V  ----1  2----  GND
+            |      |
+    MOSI  ----3  4----  CS
+            |      |
+    MISO  ----5  6----  CLK
+            |______|
+```
+
+Here's a table of connections
+
+| RTE PIN | FLASH MEM. PIN |
+|---------|----------------|
+| 1       | 2              |
+| 2       | 10             |
+| 3       | 15             |
+| 4       | 7              |
+| 5       | 8              |
+| 6       | 16             |
+
+
+### Flashing the image
+
+1. Verify the flash is properly detected.
+
+```bash
+ flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1000
+```
+
+1. (If necessary) Backup the image. A good practice is to perform this at least
+3 times and verify if checksums are matching.
+
+```bash
+flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1000 -r #image_name#
+```
+
+1. Flash the image
+
+```bash
+flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1000 -w obmc-phosphor-image-x11ssh.static.mtd
+```
+
+Result
+
+```text
+flashrom v1.3.0 on Linux 5.4.69 (armv7l)
+flashrom is free software, get the source code at https://flashrom.org
+
+Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
+Found Macronix flash chip "MX25L25635F/MX25L25645G" (32768 kB, SPI) on linux_spi.
+===
+This flash part has status UNTESTED for operations: WP
+The test status of this chip may have been updated in the latest development
+version of flashrom. If you are running the latest development version,
+please email a report to flashrom@flashrom.org if any of the above operations
+work correctly for you with this flash chip. Please include the flashrom log
+file for all operations you tested (see the man page for details), and mention
+which mainboard or programmer you tested in the subject line.
+Thanks for your help!
+Reading old flash chip contents... done.
+Erasing and writing flash chip... Erase/write done.
+Verifying flash... VERIFIED.
+
+```
+
+## User accounts
+
+The root with `0penBmc` password is created by default. It can be used
+to log in via serial.
+
+To make root be able to access WebUI, the necessary privileges need to be
+assigned. Execute following command on serial to assign the root user necessary
+privileges to be able to access webui.
+
+```bash
+busctl set-property xyz.openbmc_project.User.Manager \
+/xyz/openbmc_project/user/root \
+xyz.openbmc_project.User.Attributes UserPrivilege s 'priv-admin'
+```

meta-supermicro/meta-x11ssh/conf/layer.conf

@@ -0,0 +1,12 @@
+# We have a conf and classes directory, add to BBPATH
+BBPATH .= ":${LAYERDIR}"
+
+# We have recipes-* directories, add to BBFILES
+BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
+            ${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "x11ssh"
+BBFILE_PATTERN_x11ssh = ""
+
+BBFILE_PRIORITY_x11ssh = "5"
+LAYERSERIES_COMPAT_x11ssh = "scarthgap styhead"

meta-supermicro/meta-x11ssh/conf/machine/x11ssh.conf

@@ -0,0 +1,24 @@
+KMACHINE = "aspeed"
+KERNEL_DEVICETREE = "aspeed/aspeed-bmc-supermicro-x11ssh.dtb"
+
+require conf/machine/include/ast2400.inc
+require conf/machine/include/obmc-bsp-common.inc
+require conf/machine/include/supermicro.inc
+
+PREFERRED_PROVIDER_virtual/bootloader = "u-boot-aspeed"
+PREFERRED_PROVIDER_u-boot = "u-boot-aspeed"
+PREFERRED_PROVIDER_u-boot-fw-utils = "u-boot-fw-utils-aspeed"
+UBOOT_MACHINE:x11ssh = "ast_g4_phy_defconfig"
+UBOOT_DEVICETREE = "ast2400-evb"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40008000"
+
+FLASH_SIZE = "32768"
+
+VIRTUAL-RUNTIME_skeleton_workbook = "supermicro-${MACHINE}-config"
+
+VIRTUAL-RUNTIME_obmc-host-state-manager = "x86-power-control"
+VIRTUAL-RUNTIME_obmc-chassis-state-manager = "x86-power-control"
+VIRTUAL-RUNTIME_obmc-discover-system-state = "x86-power-control"
+
+PREFERRED_PROVIDER_virtual/phosphor-led-manager-config-native = "x11ssh-led-manager-config-native"

meta-supermicro/meta-x11ssh/conf/templates/default/bblayers.conf.sample

@@ -0,0 +1,19 @@
+# LAYER_CONF_VERSION is increased each time build/conf/bblayers.conf
+# changes incompatibly
+LCONF_VERSION = "8"
+
+BBPATH = "${TOPDIR}"
+BBFILES ?= ""
+
+BBLAYERS ?= " \
+  ##OEROOT##/meta \
+  ##OEROOT##/poky/meta-poky \
+  ##OEROOT##/meta-openembedded/meta-oe \
+  ##OEROOT##/meta-openembedded/meta-networking \
+  ##OEROOT##/meta-openembedded/meta-perl \
+  ##OEROOT##/meta-openembedded/meta-python \
+  ##OEROOT##/meta-phosphor \
+  ##OEROOT##/meta-aspeed \
+  ##OEROOT##/meta-supermicro \
+  ##OEROOT##/meta-supermicro/meta-x11ssh \
+  "

meta-supermicro/meta-x11ssh/conf/templates/default/conf-notes.txt

@@ -0,0 +1,2 @@
+Common targets are:
+     obmc-phosphor-image

meta-supermicro/meta-x11ssh/conf/templates/default/local.conf.sample

@@ -0,0 +1,17 @@
+MACHINE ??= "x11"
+DISTRO ?= "openbmc-phosphor"
+PACKAGE_CLASSES ?= "package_rpm"
+SANITY_TESTED_DISTROS:append ?= " *"
+USER_CLASSES ?= "buildstats"
+PATCHRESOLVE = "noop"
+BB_DISKMON_DIRS = "\
+    STOPTASKS,${TMPDIR},1G,100K \
+    STOPTASKS,${DL_DIR},1G,100K \
+    STOPTASKS,${SSTATE_DIR},1G,100K \
+    STOPTASKS,/tmp,100M,100K \
+    ABORT,${TMPDIR},100M,1K \
+    ABORT,${DL_DIR},100M,1K \
+    ABORT,${SSTATE_DIR},100M,1K \
+    ABORT,/tmp,10M,1K"
+CONF_VERSION = "2"
+INHERIT += "extrausers"

meta-supermicro/meta-x11ssh/recipes-bsp/u-boot/u-boot-aspeed/0001-supermicro-x11ssh-serial-routing-for-BMC-on-COM2.patch

@@ -0,0 +1,67 @@
+From e7b419ac3256d70effe1d7d638f31856730133a4 Mon Sep 17 00:00:00 2001
+From: Mateusz Kusiak <mateusz.kusiak@3mdeb.com>
+Date: Tue, 29 Apr 2025 16:04:18 +0200
+Subject: [PATCH] supermicro-x11ssh: serial routing for BMC on COM2
+
+This commit enables serial routing, so BMC can output to serial.
+The commit is heavily based on:
+https://github.com/osresearch/u-bmc/commit/8b7d1ae02a33bbfda7487b6a2162a3317a355f00
+
+Upstream-Status: Inappropriate [testing]
+Signed-off-by: Mateusz Kusiak <mateusz.kusiak@3mdeb.com>
+---
+ arch/arm/mach-aspeed/platform_g4.S | 38 +++++++++++++++++++++++++++++-
+ 1 file changed, 37 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-aspeed/platform_g4.S b/arch/arm/mach-aspeed/platform_g4.S
+index 0cdbdbfccf0e..9e61bdf482b4 100644
+--- a/arch/arm/mach-aspeed/platform_g4.S
++++ b/arch/arm/mach-aspeed/platform_g4.S
+@@ -342,7 +342,43 @@ set_MPLL:
+     and r1, r2, r1
+     str r1, [r0]
+
+-/* Debug - UART console message */
++/* Debug - UART console message on the serial port */
++#define CONFIG_DRAM_UART_TO_UART2
++#ifdef CONFIG_DRAM_UART_TO_UART1
++    // route the BMC debug uart5 to the COM1 DB9 on the backplane
++    ldr   r0, =0x1e78909c                        @ route UART5 to UART Port1, 2016.08.29
++    ldr   r1, =0x10000004
++    str   r1, [r0]
++    ldr   r0, =0x1e6e2084
++    ldr   r1, [r0]
++    mov   r2, #0xC0                              @ Enable pinmux of TXD1/RXD1
++    orr   r1, r1, r2, lsl #16
++    str   r1, [r0]
++#endif
++#ifdef CONFIG_DRAM_UART_TO_UART2
++    // route the BMC debug uart5 to the COM2 header on the mainboard
++    // and enable the /dev/ttyS0 serial output from the x86 (BMC IO1?) on the DB9 (UART1?)
++    ldr   r0, =0x1e78909c // LPC Host Interface Control Register A (HICRA) p564
++    ldr   r1, =( 0 \
++	| (0x2 << 28)	/* Route IO2 to UART5 (sel5DW) */ \
++	| (0x3 <<  3)	/* Route UART5 to IO2 (sel2IO) */ \
++	| (0x0 << 16)	/* Route IO1 to UART1 (sel1DW) */ \
++	| (0x0 <<  0)	/* Route UART1 to IO1 (sel1IO) */ \
++	)
++    str   r1, [r0]
++
++    ldr   r0, =0x1e6e2084 // System Control Unit Multi-function pin control #2 (SCU84) p345
++    ldr   r1, [r0]
++    ldr   r2, =(0 \
++	| (1 << 31) /* Enable UART2 RXD1 */ \
++	| (1 << 30) /* Enable UART2 TXD1 */ \
++	| (1 << 23) /* Enable UART1 RXD1 */ \
++	| (1 << 22) /* Enable UART1 TXD1 */ \
++	)
++    orr   r1, r1, r2, lsl #0
++    str   r1, [r0]
++#endif
++
+     ldr r0, =0x1e78400c
+     mov r1, #0x83
+     str r1, [r0]
+-- 
+2.49.0
+

meta-supermicro/meta-x11ssh/recipes-bsp/u-boot/u-boot-aspeed_2016.07.bbappend

@@ -0,0 +1,3 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+
+SRC_URI += "file://0001-supermicro-x11ssh-serial-routing-for-BMC-on-COM2.patch"