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Updates for prototype PCB build. #22

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Merged
xchrishawk merged 1 commit into from
Aug 30, 2025
Merged

Updates for prototype PCB build. #22

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6 changes: 3 additions & 3 deletions configuration.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ add_compile_definitions(
# -- Feature Options --

# Define values
set(FEATURE_OPT_DEBUG_PORT_BAUD USART_BAUD_38400
set(FEATURE_OPT_DEBUG_PORT_BAUD USART_BAUD_19200
CACHE STRING "Baud rate for debug port. (usart_baud_t)")

# Set compile definitions
Expand Down Expand Up @@ -60,11 +60,11 @@ set(CONFIG_DFLT_IO_TYPE_TRS_1_RING IO_TYPE_INPUT_PADDLE_RIGHT
CACHE STRING "I/O type for the ring of TRS 1. (io_type_t)")
set(CONFIG_DFLT_IO_POLARITY_TRS_1_RING IO_POLARITY_ACTIVE_LOW
CACHE STRING "I/O polarity for the ring of TRS 1. (io_polarity_t)")
set(CONFIG_DFLT_IO_TYPE_TRS_2_TIP IO_TYPE_NONE
set(CONFIG_DFLT_IO_TYPE_TRS_2_TIP IO_TYPE_INPUT_PADDLE_LEFT
CACHE STRING "I/O type for the tip of TRS 2. (io_type_t)")
set(CONFIG_DFLT_IO_POLARITY_TRS_2_TIP IO_POLARITY_ACTIVE_LOW
CACHE STRING "I/O polarity for the tip of TRS 2. (io_polarity_t)")
set(CONFIG_DFLT_IO_TYPE_TRS_2_RING IO_TYPE_NONE
set(CONFIG_DFLT_IO_TYPE_TRS_2_RING IO_TYPE_INPUT_PADDLE_RIGHT
CACHE STRING "I/O type for the ring of TRS 2. (io_type_t)")
set(CONFIG_DFLT_IO_POLARITY_TRS_2_RING IO_POLARITY_ACTIVE_LOW
CACHE STRING "I/O polarity for the ring of TRS 2. (io_polarity_t)")
Expand Down
2 changes: 1 addition & 1 deletion src/main/application/led.c
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
static gpio_pin_t const s_gpio_tbl[] =
{
// Must be in same order as led_t enum
GPIO_PIN_D7, /* LED_STATUS */
GPIO_PIN_C0, /* LED_STATUS */
GPIO_PIN_D6, /* LED_KEY */
};
_Static_assert( array_count( s_gpio_tbl ) == LED_COUNT, "Invalid GPIO table!" );
Expand Down