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This PR adds basic support for M31 (addition, subtraction, multiplication and shift left). This implementation differs from Plonky, STWO and Icicle in that it uses the correspondence between Mersenne numbers and one complement representation. This correspondence allows us to get rid of the asymmetry between addition and subtraction and thereby making effective use of 64 bit registers. With this PR intermediate results can accumulate to fill a 62 bit signed integer before needing reduction.