- State University of Maringá
- Computer Architecture II
- Authors:
- Gabriel Thiago H. Santos
- Thiago Issao Yasunaka
- December 2020
This project aimed to implement a two-core processor simulator, with both using the Scoreboarding instructions dynamic scheduler method.
The implementation will only address entire instructions, so it does not have floating point or load / store units. So, following the architecture with the following units:
- 1 functional unit for addition / subtraction
- 2 functional units for multiplication
- 1 functional unit for division
- 1 functional unit for logical operations
These instructions belong to the MIPS architecture. For more details see the MIPS Green Card file.
There are two directories in this project, under 'Code' you can see the source code and execute it in general along with the files that represent the Assembly. In 'Reports', you can read more about the project and how we think about developing its structures. In both it has README and MAKE, containing more information and libraries dependencies to execute the codes, in Reports it also uses make to compile the pdf made in Latex.
There are two directories in this project, in 'Code' you can see the source code and execute it in general together with files representing the Assembly. In 'Reports', you can read more about the project and how we think to develop its structures.
In both it has README and MAKE, containing more information and dependencies of libraries to execute the codes, in Reports it also uses make to compile the pdf made in Latex.
If at first you don’t succeed, try, try again. 👌
You can do it! 😉