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1. Cookabarra Cookabarra Public

   a training-target implementation of rv32im, designed to be simple and easy to understand

   Verilog 61 13

2. side_channel_attack_on_o3_cpu side_channel_attack_on_o3_cpu Public

   POC code on side channel attack, including spectre attack and meltdown; verified on the BOOMv3 (smallBoomconfig)

   C 13 1

3. Cookabarra_Jtag Cookabarra_Jtag Public

   debug module was partially supported

   Verilog 1

4. simpoint_openc910 simpoint_openc910 Public

   modified openc910 for the simpoint purpose, some changess to the original openc910 git repo

   Verilog 1 1

5. soc_ip soc_ip Public

   some open source IP used in the soc, including AHB, APB, Uart, SPI

   SystemVerilog 1

6. riscv_ibex_verilator riscv_ibex_verilator Public

   the simplified verilator simulation env for risc-v ibex core

   SystemVerilog