A Computational Model with Explicit Structural Cost
Insight is not free. Every time a computer figures something out---factors a number, finds a pattern, solves a puzzle---it pays a cost. Not time. Not memory. Information. This cost is the mu-bit (
Classical complexity theory measures time and space but assigns zero cost to structural knowledge. The Thiele Machine makes that cost explicit, measurable, and enforceable.
Every claim in this repository has a concrete falsifier. If you think something is wrong, the proofs won't compile.
git clone https://github.com/sethirus/The-Thiele-Machine.git
cd The-Thiele-Machine
pip install -r requirements.txt
pip install -e . --no-deps
pytest tests/# Assemble an example program
thiele-asm examples/fibonacci.asm -o fibonacci.hex
# Run it in the interactive debugger
thiele-debug fibonacci.hexDebugger commands: run, step, break <n>, print <reg|mu|tensor>, continue, quit.
See DEBUGGER.md for full reference.
# hello.asm — μ-cost grows monotonically
LOAD_IMM 0 42 1 # r0 = 42, cost 1
LOAD_IMM 1 0 1 # r1 = 0, cost 1
ADD 2 0 1 1 # r2 = r0 + r1, cost 1
HALT 0thiele-asm hello.asm -o hello.hex
thiele-debug hello.hex
# > run
# HALTED pc=3 mu=3 r2=42See ASM_REFERENCE.md for all 26 opcodes, encoding format, and examples.
python examples/run_all.py
# 20/20 programs pass simulation — cycles, μ-cost, halted/error statusmake -C coqiverilog thielecpu/hardware/rtl/*.v -o thiele_cpu
# optional alternate simulator
verilator --binary --timing -Ithielecpu/hardware/rtl \
-DYOSYS_LITE --top-module thiele_cpu_tb \
thielecpu/hardware/rtl/thiele_cpu_unified.v \
thielecpu/hardware/testbench/thiele_cpu_tb.vWhen using Python co-simulation (thielecpu.hardware.cosim.run_verilog), select backend with THIELE_RTL_SIM=iverilog|verilator.
- Curvature/deflection experiments in this repository are computational-model observations (ÎĽ-metric behavior), not claims of literal spacetime curvature in physical silicon.
- Singular behavior differs by layer:
- Python VM: Bianchi violations raise
BianchiViolationError(fail-fast exception). - Verilog RTL:
bianchi_alarmlatches a kill-switch and freezes instruction progress in fetch.
- Python VM: Bianchi violations raise
ECP5 target (recommended — ULX3S or Colorlight-i5):
cd thielecpu/hardware/rtl
yosys synth_ecp5.ys # → build/thiele_ecp5.json
nextpnr-ecp5 --85k --package CABGA381 \
--json ../../../build/thiele_ecp5.json \
--lpf ../../../fpga/thiele_ecp5.lpf \
--textcfg ../../../build/thiele_ecp5.config \
--lpf-allow-unconstrained
ecppack ../../../build/thiele_ecp5.config ../../../build/thiele_ecp5.bitSynthesis note: synth_ecp5.ys targets thiele_cpu_top — a 5-pin physical
wrapper (CLK/RST_N/LED_HALTED/LED_ERR/LED_BIANCHI) over mkModule1. The
full mkModule1 synthesis (74 k ECP5 cells, logic-area validation) runs via
synth_full.ys. Both flows have been validated; build/thiele_ecp5.bit exists.
iCE40 target (iCEBreaker):
cd thielecpu/hardware/rtl
yosys synth_ice40.ys # → build/thiele_ice40.json
nextpnr-ice40 --hx8k --package bg121 \
--json ../../build/thiele_ice40.json \
--pcf fpga/thiele_ice40.pcf \
--asc ../../build/thiele_ice40.asc
icepack ../../build/thiele_ice40.asc ../../build/thiele_ice40.binThe CPU is built with SYNTHESIS defined to use compatible array primitives.
| Component | Status |
|---|---|
| Coq proofs | 318 files, ~92,680 lines, 2,921 theorems/lemmas, zero admits, zero axioms beyond foundational logic |
| Python VM | 24,308 lines. Working reference implementation with cryptographic receipts |
| Verilog RTL | 8 source files, ~2,500 hand-written lines (+ synthesis output). Synthesizable, FPGA-targetable |
| Test suite | 1,094 tests across 120 test files |
| 3-layer isomorphism | Coq |
| Inquisitor audit | All 318 Coq files pass maximum-strictness static analysis with zero findings |
The Thiele Machine extends the Turing Machine with a monotonically non-decreasing cost ledger. For any instruction
where
If
-
Instruction-consistency:
$M(s') = M(s) + c(i)$ for fixed cost function$c$ -
Zero initialization:
$M(s_0) = 0$
Then
Search space reduction requires proportional
where
For any trace
Since each
Each instruction carries an irreversibility count:
The total irreversible bit count over a trace bounds the minimum energy dissipation via Landauer's principle:
Three discrete physics models are embedded into the VM with constructive proofs:
Reversible lattice gas (zero
Wave propagation (zero
Dissipative lattice (positive
For reversible embeddings, the irreversible bit count is provably zero:
The CHSH score
| Regime |
|
Bound | Win Rate |
|---|---|---|---|
| Classical | 75% | ||
| Quantum | 85.35% | ||
| Supra-quantum | 100% |
The Tsirelson bound emerges from
The Christoffel symbols on a lattice with metric
For uniform mass distribution
High information density (stress-energy) drives more PNEW operations:
This is the "information curves spacetime" principle: dense information regions undergo more structural refinement.
| Theorem | What It Establishes | File |
|---|---|---|
mu_is_initial_monotone |
|
kernel/MuInitiality.v |
mu_is_landauer_valid |
|
kernel/MuNecessity.v |
no_free_insight_general |
Search space reduction requires proportional |
kernel/NoFreeInsight.v |
mu_conservation_kernel |
|
kernel/MuLedgerConservation.v |
main_subsumption |
Thiele Machine strictly subsumes Turing Machine | kernel/Subsumption.v |
local_box_CHSH_bound |
Unitary execution bound: |
kernel/MinorConstraints.v |
thiele_simulates_turing |
Proper simulation of Turing computation | kernel/ProperSubsumption.v |
lattice_gas_embeddable |
Reversible lattice gas embeds into VM | thielemachine/PhysicsEmbedding.v |
wave_embeddable |
Wave model embeds into VM | thielemachine/WaveEmbedding.v |
dissipative_embeddable |
Dissipative model embeds with |
thielemachine/DissipativeEmbedding.v |
The Thiele Machine is defined as a 5-tuple
| Component | Description |
|---|---|
| State space (VMState: registers, memory, pc, |
|
| Partition graph---how state decomposes into modules | |
| Axiom sets---logical constraints per module | |
| Transition rules---the 18-instruction ISA | |
| Logic Engine---SAT/UNSAT certificate verification |
Structural: PNEW, PSPLIT, PMERGE, PDISCOVER
Logical: LASSERT, LJOIN, MDLACC, EMIT, REVEAL
Compute: XFER, XOR_LOAD, XOR_ADD, XOR_SWAP, XOR_RANK
Quantum: CHSH_TRIAL
Special: PYEXEC, ORACLE_HALTS
Control: HALT
Every instruction takes an explicit
The Thiele Machine is implemented at three layers producing identical state projections:
| Layer | Implementation | Purpose |
|---|---|---|
| Coq | 310 proof files, ~90,350 lines, zero admits | Mathematical ground truth |
| Python | 20,810 lines, receipts and traces | Executable reference |
| Verilog | 8 source files, ~2,500 hand-written lines, synthesizable RTL | Physical realization |
For any instruction trace
Quantum mechanics is not postulated. It falls out of
| File | Theorems | What It Derives |
|---|---|---|
NoCloning.v |
7 | Perfect cloning costs |
NoCloningFromMuMonotonicity.v |
3 | Machine-native no-cloning |
Unitarity.v |
6 | Zero-cost evolution is CPTP |
BornRule.v |
10 | $P = |
BornRuleFromSymmetry.v |
31 | Born rule from tensor consistency |
Purification.v |
7 | Mixed states need references |
TsirelsonGeneral.v |
15 |
|
TsirelsonFromAlgebra.v |
11 | Self-contained algebraic Tsirelson |
Every claim has a concrete falsifier. To disprove:
-
$\mu$ -conservation: Find ANY instruction where$\mu_\delta < 0$ . -
No Free Insight: Certify
$P_{\text{strong}}$ fromclean_startwith no revelation event. -
No-signaling: Find an instruction on module
$A$ that changes module$B$ 's observables. -
Tsirelson bound: Find a quantum-admissible box with
$S > 5657/2000$ . - No-cloning: Build a zero-cost perfect cloner.
-
3-layer isomorphism: Find a program where Python
$\neq$ Coq$\neq$ RTL.
If you find any of these, the Coq proofs won't compile.
The-Thiele-Machine/
+-- coq/ # 318 Coq proof files (~92,680 lines)
| +-- kernel/ # Core theorems (MuInitiality, NoFreeInsight, etc.)
| +-- modular_proofs/ # Turing/Minsky simulation proofs
| +-- nofi/ # No Free Insight functor architecture
| +-- physics/ # Discrete, wave, and dissipative models
| +-- thielemachine/ # VM proofs and physics embeddings
| +-- thiele_manifold/ # PhysicsIsomorphism and embedding framework
| +-- isomorphism/ # Categorical Universe proof
| +-- bridge/ # Domain-to-kernel bridges
| `-- ... # 26+ subdirectories total
+-- thielecpu/ # Python VM (24,308 lines)
| +-- vm.py # Core execution engine
| +-- state.py # State machine, partitions, mu-ledger
| +-- isa.py # 18-instruction ISA
| `-- hardware/ # Verilog RTL (8 source files)
+-- build/ # Compiled OCaml VM runner and artifacts
+-- tests/ # 1,094 tests across 120 test files
+-- scripts/ # Build, verification, inquisitor
+-- tools/ # mu-Profiler and extracted VM runner
+-- verifier/ # Physics divergence verification
`-- thesis/ # Complete thesis (PDF + LaTeX)
All Coq proofs pass maximum-strictness static analysis:
python scripts/inquisitor.py25+ lint rules enforced on every Coq file:
- Zero
Admitted/admit/give_upacross all 318 proof files - Zero custom axioms beyond
AssumptionBundle.v - All proofs end with
QedorDefined - Standard library axioms only (functional extensionality, classical decidability)
Every execution produces a cryptographic receipt chain:
receipt = {
"pre_state_hash": SHA256(state_before),
"instruction": opcode,
"post_state_hash": SHA256(state_after),
"mu_cost": cost,
"chain_link": SHA256(previous_receipt)
}This enables post-hoc verification without re-execution.
Python (3.10+):
z3-solver--- SMT solvingcryptography,pynacl--- Receipt verificationnumpy,scipy--- Numerical computationpytest,hypothesis--- Testing
Coq (8.18+):
- Required only to rebuild proofs
Verilog:
iverilogfor simulationyosys+nextpnr-ecp5+ecppackfor open-source FPGA synthesis
Two contribution types:
-
Replication artifacts --- New proofpacks testing
$\mu$ -ledger predictions. - Counterexample hunts --- Attempts to violate the Cost Invariant.
Report potential counterexamples via issue labeled counterexample.
@misc{thielemachine2026,
title={The Thiele Machine: A Computational Model with Explicit Structural Cost},
author={Thiele, Devon},
year={2026},
howpublished={\url{https://github.com/sethirus/The-Thiele-Machine}}
}Apache 2.0 --- See LICENSE
The Turing Machine gave us universality. The Thiele Machine gives us universality plus accountability.