GitHub - samueldemoura/fpga-testvec-gen: Generates test vector input files for use with ModelSim Altera. · GitHub

Name		Name	Last commit message	Last commit date
Latest commit History 11 Commits
.gitignore		.gitignore
cla16.cpp		cla16.cpp
cla4.cpp		cla4.cpp
gates.cpp		gates.cpp
inverter_4bit.cpp		inverter_4bit.cpp
priority.cpp		priority.cpp

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Generates test vector input files for use with ModelSim Altera.

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