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Fix: fix tdo io direction from input to inout #446

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Fix: fix tdo io direction from input to inout #446

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2 changes: 1 addition & 1 deletion target/fpga/pulpissimo-nexys/rtl/xilinx_pulpissimo.v
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ module xilinx_pulpissimo (

inout wire pad_jtag_tck,
inout wire pad_jtag_tdi,
input wire pad_jtag_tdo,
inout wire pad_jtag_tdo,
inout wire pad_jtag_tms
//input wire pad_jtag_trst
);
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