Added hostname and blinkenlights when processing data

.gitignore

@@ -0,0 +1,61 @@
+# Prerequisites
+*.d
+
+# Object files
+*.o
+*.ko
+*.obj
+*.elf
+*.bin
+
+# Linker output
+*.ilk
+*.map
+*.exp
+
+# Precompiled Headers
+*.gch
+*.pch
+
+# Libraries
+*.lib
+*.a
+*.la
+*.lo
+
+# Shared objects (inc. Windows DLLs)
+*.dll
+*.so
+*.so.*
+*.dylib
+
+# Executables
+*.exe
+*.out
+*.app
+*.i*86
+*.x86_64
+*.hex
+
+# Debug files
+*.dSYM/
+*.su
+*.idb
+*.pdb
+
+# Kernel Module Compile Results
+*.mod*
+*.cmd
+.tmp_versions/
+modules.order
+Module.symvers
+Mkfile.old
+dkms.conf
+/project/realtek_ameba1_va0_example/GCC-RELEASE/application
+/tools/arm-none-eabi-gcc
+build_info.h
+component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
+project/realtek_ameba1_va0_example/GCC-RELEASE/fwsize.gdb
+component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_debug.txt
+component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt
+component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_ramdebug.txt

README.md

@@ -0,0 +1,13 @@
+I recommend a cheap DAP-link, I got 12MHz on SWD easily, but STLink should also work  
+Use Cygwin if on Windows (or change uname to include CYGWIN).  
+open two terminals in `rtl_firmware/project/realtek_ameba1_va0_example/GCC-RELEASE/`  
+in #1:  
+`export GDB_SERVER=openocd`  
+`make setup`  
+`make`  
+`./run_openocd_stlink.sh` or `./run_openocd_daplink.sh`  
+in #2:  
+`make flash`  
+You can change hostname in `component\common\network\lwip\lwip_v1.4.1\src\core\dhcp.c` (there has to be a better way but this code is spaghetti anyway, it works)  
+If you have problems with flashing uncomment `(STRIP) $(BIN_DIR)/$(TARGET).axf` in `rtl_firmware/project/realtek_ameba1_va0_example/GCC-RELEASE/application.mk` (it caused problems with my setup)  
+General instruction: https://github.com/parasite85/tuya_tygwzw1_hack

component/common/example/socket_tcp_trx/example_socket_tcp_trx_1.c

@@ -12,6 +12,13 @@
 #define UART_TX    PA_7
 #define UART_RX    PA_6
 
+#define GPIO_LEDB_PIN       PC_0
+#define GPIO_LEDR_PIN       PC_1
+#define GPIO_PUSHBT_PIN    PB_2
+gpio_t gpio_ledb;
+gpio_t gpio_ledr;
+gpio_t gpio_btn;
+
 static int tx_exit = 0, rx_exit = 0;
 //static _Sema tcp_tx_rx_sema;
 static _sema tcp_tx_rx_sema;
@@ -63,6 +70,7 @@ static void tx_thread(void *param)
 
         if (j>0)
         {
+			gpio_write(&gpio_ledr, 1);
 #ifdef Z_UART_DEBUG
             printf("%d bytes UART->TCP: ", j);
             int i = 0;
@@ -81,6 +89,7 @@ static void tx_thread(void *param)
             {
                 printf("buff corrupted");
             }
+			gpio_write(&gpio_ledr, 0);
         }
         else
         {
@@ -117,6 +126,7 @@ static void rx_thread(void *param)
 		getsockopt(client_fd, SOL_SOCKET, SO_ERROR, &sock_err, &err_len);
 		rtw_up_sema(&tcp_tx_rx_sema);
         if (ret > 0){
+			gpio_write(&gpio_ledb, 1);
 #ifdef Z_UART_DEBUG
             printf("%d bytes TCP->UART: ", ret);
             int i=0;
@@ -127,6 +137,7 @@ static void rx_thread(void *param)
             printf("\n");
 #endif
             uart_send_data( &sobj, buffer, ret);
+			gpio_write(&gpio_ledb, 0);
         }
 
 		// ret == -1 and socket error == EAGAIN when no data received for nonblocking
@@ -211,6 +222,21 @@ static void example_socket_tcp_trx_thread(void *param)
 void example_socket_tcp_trx_1(void)
 {
 
+    // Init LED control pin
+    gpio_init(&gpio_ledb, GPIO_LEDB_PIN);
+    gpio_dir(&gpio_ledb, PIN_OUTPUT);    // Direction: Output
+    gpio_mode(&gpio_ledb, PullNone);     // No pull
+
+    // Init LED control pin
+    gpio_init(&gpio_ledr, GPIO_LEDR_PIN);
+    gpio_dir(&gpio_ledr, PIN_OUTPUT);    // Direction: Output
+    gpio_mode(&gpio_ledr, PullNone);     // No pull
+
+    // Initial Push Button pin
+    gpio_init(&gpio_btn, GPIO_PUSHBT_PIN);
+    gpio_dir(&gpio_btn, PIN_INPUT);     // Direction: Input
+    gpio_mode(&gpio_btn, PullUp);       // Pull-High
+
     // mbed uart test
     rtw_init_sema(&uart_tx_rx_sema, 1);
     serial_init(&sobj,UART_TX,UART_RX);

component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c

@@ -1476,6 +1476,7 @@ dhcp_option_long(struct dhcp *dhcp, u32_t value)
 static void
 dhcp_option_hostname(struct dhcp *dhcp, struct netif *netif)
 {
+  netif->hostname = "ZB2MQTT";
   if (netif->hostname != NULL) {
     size_t namelen = strlen(netif->hostname);
     if (namelen > 0) {

component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1.cfg

@@ -45,8 +45,9 @@ set _TARGETNAME $_CHIPNAME.cpu
 dap create dap_name -chain-position $_TARGETNAME
 target create $_TARGETNAME cortex_m -dap dap_name
 
-adapter_khz 500
-adapter_nsrst_delay 100
+adapter_khz 12000
+#adapter_khz 500
+#adapter_nsrst_delay 100
 
 # delays on reset lines
 adapter_nsrst_delay 200

component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1_daplink.cfg

@@ -0,0 +1,123 @@
+# Main file for Ameba1 series Cortex-M3 parts
+#
+# !!!!!!
+#
+
+set CHIPNAME rtl8195a
+set CHIPSERIES ameba1
+
+# Adapt based on what transport is active.
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	error "CHIPNAME not set. Please do not include ameba1.cfg directly."
+}
+
+if { [info exists CHIPSERIES] } {
+	# Validate chip series is supported
+	if { $CHIPSERIES != "ameba1" } {
+		error "Unsupported chip series specified."
+	}
+	set _CHIPSERIES $CHIPSERIES
+} else {
+	error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
+}
+
+if { [info exists CPUTAPID] } {
+	# Allow user override
+	set _CPUTAPID $CPUTAPID
+} else {
+	# Ameba1 use a Cortex M3 core.
+	if { $_CHIPSERIES == "ameba1" } {
+		if { [using_jtag] } {
+			set _CPUTAPID 0x4ba00477
+		} {
+			set _CPUTAPID 0x2ba01477
+		}
+	}
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+dap create dap_name -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -dap dap_name
+
+adapter_khz 12000
+#adapter_khz 500
+#adapter_nsrst_delay 100
+
+# delays on reset lines
+adapter_nsrst_delay 200
+if {[using_jtag]} {
+ jtag_ntrst_delay 200
+}
+
+
+# Ameba1 (Cortex M3 core) support SYSRESETREQ
+if {![using_hla]} {
+    # if srst is not fitted use SYSRESETREQ to
+    # perform a soft reset
+    cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event reset-init {ameba1_init}
+
+# Ameba1 SDRAM enable
+proc ameba1_init { } {
+	# init System
+	mww 0x40000014 0x00000021
+	sleep 10
+	mww	0x40000304 0x1fc00002
+	sleep 10
+	mww 0x40000250 0x00000400
+	sleep 10
+	mww 0x40000340 0x00000000
+	sleep 10
+	mww 0x40000230 0x0000dcc4
+	sleep 10
+	mww 0x40000210 0x00011117
+	sleep 10
+	mww 0x40000210 0x00011157
+	sleep 10
+	mww 0x400002c0 0x00110011
+	sleep 10
+	mww 0x40000320 0xffffffff
+	sleep 10
+	# init SDRAM
+	mww 0x40000040 0x00fcc702
+	sleep 10
+	mdw 0x40000040
+	mww 0x40005224 0x00000001
+	sleep 10
+	mww 0x40005004 0x00000208
+	sleep 10
+	mww 0x40005008 0xffffd000
+	sleep 13
+	mww 0x40005020 0x00000022
+	sleep 13
+	mww 0x40005010 0x09006201
+	sleep 13
+	mww 0x40005014 0x00002611
+	sleep 13
+	mww 0x40005018 0x00068413
+	sleep 13
+	mww 0x4000501c 0x00000042
+	sleep 13
+	mww 0x4000500c 0x700 		;# set Idle
+	sleep 20
+	mww 0x40005000 0x1 			;# start init
+	sleep 100
+	mdw 0x40005000			
+	mww 0x4000500c 0x600		;# enter memory mode
+	sleep 30
+
+	mww 0x40005008 0x00000000	;# 0xf00
+	;# mww 0x40005008 0x00000f00
+	sleep 3
+	mww 0x40000300 0x0006005e	;# 0x5e
+	;# mww 0x40000300 0x0000005e
+	sleep 3
+}