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    33 repositories

    • Interconnect-Crypto

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Apr 25, 2026Apr 25, 2026

    • Schemify

      Public
      A Schematic Editor built for portability and reusability
      Zig
      •
      GNU General Public License v3.0
      •0•2•1•0•Updated Apr 16, 2026Apr 16, 2026

    • Crypto-Digital-Top

      Public
      Crpto accelerator top
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Apr 13, 2026Apr 13, 2026

    • control-group

      Public
      Python
      •
      Apache License 2.0
      •1•4•0•2•Updated Apr 2, 2026Apr 2, 2026

    • Crypto-AES

      Public
      Verilog
      •
      Apache License 2.0
      •2•1•1•0•Updated Apr 1, 2026Apr 1, 2026

    • Matrix-Vector-Multiplier

      Public
      A miniature analog Matrix-Vector Multiplier designed for TinyTapeout Fab
      Makefile
      •0•1•0•0•Updated Mar 30, 2026Mar 30, 2026

    • Crypto-SHA

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•2•0•Updated Mar 20, 2026Mar 20, 2026

    • Ethernet-CRC32

      Public
      CRC-32 computation module for a 64-bit data input, designed to meet timing at 125 MHz on the Sky130 process. Part of the W26 Ethernet training and research proj…
      Verilog
      •
      Apache License 2.0
      •1•1•0•0•Updated Mar 17, 2026Mar 17, 2026

    • ADC_DAC

      Public
      Library of ADC/DACs that we can use in future projects
      Makefile
      •0•0•0•0•Updated Mar 15, 2026Mar 15, 2026

    • AnalogLibrary

      Public
      Contains all shared Schematic/Symbols
      Python
      •0•0•0•0•Updated Mar 14, 2026Mar 14, 2026

    • TinyTracer

      Public
      Verilog
      •
      Apache License 2.0
      •1•1•0•0•Updated Mar 14, 2026Mar 14, 2026

    • Ethernet-Transceiver

      Public
      Serial-to-parallel Ethernet frame receiver and transmitter operating at 125MHz. Part of the W26 Ethernet training and research projects.
      Verilog
      •
      Apache License 2.0
      •3•1•0•0•Updated Mar 8, 2026Mar 8, 2026

    • Ethernet-fifo

      Public
      Synchronous and asynchronous FIFO implementations. Part of the W26 Ethernet training and research projects.
      Verilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Mar 8, 2026Mar 8, 2026

    • Ethernet-MAC

      Public
      MAC address extraction, classification, and table lookup with aging module targeting 125 MHz. Part of the W26 Ethernet training and research projects.
      Verilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Mar 8, 2026Mar 8, 2026

    • Mem-Crypto-Updated

      Public
      no description
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Mar 5, 2026Mar 5, 2026

    • Memory-Interface-Crypto

      Public
      Python
      •
      Apache License 2.0
      •3•1•0•1•Updated Mar 3, 2026Mar 3, 2026

    • TinyTapeout_Flows

      Public template
      Zero Dependency, Zero Hassle (Digital, Analog, Mixed) Design Template
      Makefile
      •0•2•0•0•Updated Jan 19, 2026Jan 19, 2026

    • -Cryptographic-Accelerator-Top2

      Public
      Modular Accelerator with AES Encryptian, SHA Hashing, and Memory Interfacing.
      Verilog
      •0•0•0•0•Updated Jan 10, 2026Jan 10, 2026

    • NixPackages

      Public
      Building nix packages locally for our workflow
      Nix
      •0•0•0•0•Updated Jan 7, 2026Jan 7, 2026

    • UWASIC-ALG

      Public
      UWASIC python-exposed optimizer made for easy usage with xschem
      Rust
      •0•1•0•0•Updated Nov 26, 2025Nov 26, 2025

    • Cryptographic-Accelerator-Top

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Nov 23, 2025Nov 23, 2025

    • Dino

      Public
      Verilog
      •
      Apache License 2.0
      •3•2•0•3•Updated Nov 8, 2025Nov 8, 2025

    • analog-mv-mult-sim

      Public
      0•0•0•0•Updated Jul 3, 2025Jul 3, 2025

    • landing

      Public
      UWASIC homepage
      JavaScript
      •
      MIT License
      •0•0•0•0•Updated Apr 29, 2025Apr 29, 2025

    • onboarding-start

      Public
      Welcome to UWASIC! Start here.
      Python
      •
      Apache License 2.0
      •125•0•0•1•Updated Apr 11, 2025Apr 11, 2025

    • diagrams

      Public
      0•0•0•0•Updated Apr 6, 2025Apr 6, 2025

    • Dino-ttihp25a

      Public
      Factory test project for for Tiny Tapeout IHP 25A Factory test
      C++
      •
      Apache License 2.0
      •1•0•0•0•Updated Mar 12, 2025Mar 12, 2025

    • tt10-verilog-template

      Public template
      Submission template for Tiny Tapeout 10 - Verilog HDL Projects. Now for prototyping the sound module for UWASIC competition project.
      Verilog
      •
      Apache License 2.0
      •265•0•0•0•Updated Mar 2, 2025Mar 2, 2025

    • dino-player-group

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Feb 14, 2025Feb 14, 2025

    • score-rng

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•1•Updated Feb 13, 2025Feb 13, 2025
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