NO MERGE: TEST ONLY: 5.15 velinux combine all PRs.#83

Closed

bhe4 wants to merge 233 commits intoopenvelinux:5.15-velinuxfrom

bhe4:5.15-velinux_all_without_57

Commits on Oct 21, 2025

blk-mq: avoid extending delays of active hctx from blk_mq_delay_run_hw_queues

David Jeffery
authored and
bhe4
committed
dmaengine: idxd: Add a new DSA device ID for Granite Rapids-D platform

Fenghua Yu
authored and
bhe4
committed
selftests/sgx: Ignore OpenSSL 3.0 deprecated functions warning

kaccardi
authored and
bhe4
committed
x86/sgx: Improve comments for sgx_encl_lookup/alloc_backing()

kaccardi
authored and
bhe4
committed
x86/sgx: Allow enclaves to use Asynchrounous Exit Notification

hansendc
authored and
bhe4
committed
KVM/VMX: Allow exposing EDECCSSA user leaf function to KVM guest

kaihuang
authored and
bhe4
committed
KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms

sandip4n
authored and
bhe4
committed
KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible

sean-jc
authored and
bhe4
committed
KVM: x86: Manually retrieve CPUID.0x1 when getting FMS for RESET/INIT

sean-jc
authored and
bhe4
committed
KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0

Wanpeng Li
authored and
bhe4
committed
KVM: x86: Drop current_vcpu for kvm_running_vcpu + kvm_arch_vcpu variable

sean-jc
authored and
bhe4
committed
KVM: Move x86's perf guest info callbacks to generic KVM

sean-jc
authored and
bhe4
committed
KVM: x86/svm: Add module param to control PMU virtualization

Like Xu
authored and
bhe4
committed
KVM: x86: avoid out of bounds indices for fixed performance counters

bonzini
authored and
bhe4
committed
KVM: x86/pmu: Setup pmc->eventsel for fixed PMCs

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Reuse pmc_perf_hw_id() and drop find_fixed_event()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Add pmc->intr to refactor kvm_perf_overflow{_intr}()

Like Xu
authored and
bhe4
committed
KVM: x86: Update vPMCs when retiring instructions

ehankland
authored and
bhe4
committed
KVM: SVM: include CR3 in initial VMSA state for SEV-ES guests

mdroth
authored and
bhe4
committed
KVM: x86: Do runtime CPUID update before updating vcpu->arch.cpuid_entries

vittyvk
authored and
bhe4
committed
KVM: x86: Making the module parameter of vPMU more common

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Use binary search to check filtered events

jsmattsonjr
authored and
bhe4
committed
KVM: x86: Remove defunct pre_block/post_block kvm_x86_ops hooks

sean-jc
authored and
bhe4
committed
KVM: x86: Move CPUID.(EAX=0x12,ECX=1) mangling to __kvm_update_cpuid_runtime()

vittyvk
authored and
bhe4
committed
KVM: x86: skip host CPUID call for hypervisor leaves

bonzini
authored and
bhe4
committed
KVM: x86: Drop export for .tlb_flush_current() static_call key

sean-jc
authored and
bhe4
committed
KVM: x86: Rename kvm_x86_ops pointers to align w/ preferred vendor names

sean-jc
authored and
bhe4
committed
KVM: nVMX: Refactor PMU refresh to avoid referencing kvm_x86_ops.pmu_ops

sean-jc
authored and
bhe4
committed
KVM: x86: Use more verbose names for mem encrypt kvm_x86_ops hooks

sean-jc
authored and
bhe4
committed
KVM: x86: return 1 unconditionally for availability of KVM_CAP_VAPIC

bonzini
authored and
bhe4
committed
KVM: x86: use static_call_cond for optional callbacks

bonzini
authored and
bhe4
committed
KVM: x86: remove KVM_X86_OP_NULL and mark optional kvm_x86_ops

bonzini
authored and
bhe4
committed
KVM: x86: warn on incorrectly NULL members of kvm_x86_ops

bonzini
authored and
bhe4
committed
KVM: x86: allow defining return-0 static calls

bonzini
authored and
bhe4
committed
KVM: x86: Fix pointer mistmatch warning when patching RET0 static calls

sean-jc
authored and
bhe4
committed
KVM: x86: add support for CPUID leaf 0x80000021

bonzini
authored and
bhe4
committed
KVM: x86: synthesize CPUID leaf 0x80000021h if useful

bonzini
authored and
bhe4
committed
KVM: x86: Fix clang -Wimplicit-fallthrough in do_host_cpuid()

nathanchance
authored and
bhe4
committed
KVM: x86: Move lookup of indexed CPUID leafs to helper

mdroth
authored and
bhe4
committed
KVM: x86: Move kvm_ops_static_call_update() to x86.c

Like Xu
authored and
bhe4
committed
KVM: x86: Copy kvm_pmu_ops by value to eliminate layer of indirection

Like Xu
authored and
bhe4
committed
KVM: x86: Move .pmu_ops to kvm_x86_init_ops and tag as __initdata

Like Xu
authored and
bhe4
committed
KVM: x86: Use static calls to reduce kvm_pmu_ops overhead

Like Xu
authored and
bhe4
committed
KVM: x86: work around QEMU issue with synthetic CPUID leaves

bonzini
authored and
bhe4
committed
kvm: x86/pmu: Fix the compare function used by the pmu event filter

suomilewis
authored and
bhe4
committed
KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Reprogram PEBS event to emulate guest PEBS counter

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to support guest DS

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Add PEBS_DATA_CFG MSR emulation to support adaptive PEBS

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Move pmc_speculative_in_use() to arch/x86/kvm/pmu.h

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Disable guest PEBS temporarily in two rare situations

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Add kvm_pmu_cap to optimize perf_get_x86_pmu_capability

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: remove useless prototype

bonzini
authored and
bhe4
committed
KVM: x86/pmu: Don't overwrite the pmu->global_ctrl when refreshing

Like Xu
authored and
bhe4
committed
KVM: x86: always allow host-initiated writes to PMU MSRs

bonzini
authored and
bhe4
committed
KVM: x86/pmu: Extract check_pmu_event_filter() handling both GP and fixed counters

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Pass only "struct kvm_pmc *pmc" to reprogram_counter()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Drop "u64 eventsel" for reprogram_gp_counter()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Drop "u8 ctrl, int idx" for reprogram_fixed_counter()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Use only the uniform interface reprogram_counter()

bonzini
authored and
bhe4
committed
KVM: x86/pmu: Use PERF_TYPE_RAW to merge reprogram_{gp,fixed}counter()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Update global enable_pmu when PMU is undetected

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Restrict advanced features based on module enable_pmu

Like Xu
authored and
bhe4
committed
Revert "KVM: x86: always allow host-initiated writes to PMU MSRs"

sean-jc
authored and
bhe4
committed
KVM: VMX: Use vcpu_get_perf_capabilities() to get guest-visible value

sean-jc
authored and
bhe4
committed
KVM: x86: Ignore benign host accesses to "unsupported" PEBS and BTS MSRs

sean-jc
authored and
bhe4
committed
KVM: x86: Provide per VM capability for disabling PMU virtualization

David Dunn
authored and
bhe4
committed
KVM: x86: Add dedicated helper to get CPUID entry with significant index

sean-jc
authored and
bhe4
committed
KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES

sean-jc
authored and
bhe4
committed
perf/x86/core: Completely disable guest PEBS via guest's global_ctrl

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Avoid setting BIT_ULL(-1) to pmu->host_cross_mapped_mask

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Don't generate PEBS records for emulated instructions

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Refactor PERF_GLOBAL_CTRL update helper for reuse by PEBS

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Avoid using PEBS perf_events for normal counters

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Limit the maximum number of supported Intel GP counters

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Limit the maximum number of supported AMD GP counters

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Defer reprogram_counter() to kvm_pmu_handle_event()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Clear "reprogram" bit if counter is disabled or disallowed

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Defer counter emulated overflow via pmc->prev_counter

Like Xu
authored and
bhe4
committed
KVM: x86: Update KVM-only leaf handling to allow for 100% KVM-only leafs

sean-jc
authored and
bhe4
committed
KVM: x86: Advertise that the SMM_CTL MSR is not supported

jsmattsonjr
authored and
bhe4
committed
KVM: x86: Move Intel Processor Trace interrupt handler to vmx.c

sean-jc
authored and
bhe4
committed
KVM: x86: Move hardware setup/unsetup to init/exit

sean-jc
authored and
bhe4
committed
KVM: x86: Move guts of kvm_arch_init() to standalone helper

sean-jc
authored and
bhe4
committed
KVM: x86: Serialize vendor module initialization (hardware setup)

sean-jc
authored and
bhe4
committed
KVM: x86: Move open-coded CPUID leaf 0x80000021 EAX bit propagation code

kimphillamd
authored and
bhe4
committed
x86/cpu, kvm: Add the Null Selector Clears Base feature

kimphillamd
authored and
bhe4
committed
x86/cpu: Support AMD Automatic IBRS

kimphillamd
authored and
bhe4
committed
KVM: x86: Propagate the AMD Automatic IBRS feature to the guest

kimphillamd
authored and
bhe4
committed
KVM: x86/pmu: Cap kvm_pmu_cap.num_counters_gp at KVM's internal max

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Use separate array for defining "PMU MSRs to save"

sean-jc
authored and
bhe4
committed
docs: kvm: x86: Fix broken field list

zulinx86
authored and
bhe4
committed
KVM: x86/pmu: Rename pmc_is_enabled() to pmc_is_globally_enabled()

Like Xu
authored and
bhe4
committed
KVM: VMX: Refactor intel_pmu_{g,}set_msr() to align with other helpers

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Rewrite reprogram_counters() to improve performance

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Fix a typo in kvm_pmu_request_counter_reprogam()

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Prevent the PMU from counting disallowed events

suomilewis
authored and
bhe4
committed
KVM: x86/pmu: Rename global_ovf_ctrl_mask to global_status_mask

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Move reprogram_counters() to pmu.h

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Reject userspace attempts to set reserved GLOBAL_STATUS bits

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Move handling PERF_GLOBAL_CTRL and friends to common x86

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Provide Intel PMU's pmc_is_enabled() as generic x86 code

Like Xu
authored and
bhe4
committed
KVM: x86: Explicitly zero cpuid "0xa" leaf when PMU is disabled

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Disable vPMU if the minimum num of counters isn't met

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Advertise PERFCTR_CORE iff the min nr of counters is met

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Constrain the num of guest counters with kvm_pmu_cap

Like Xu
authored and
bhe4
committed
KVM: x86/cpuid: Add a KVM-only leaf to redirect AMD PerfMonV2 flag

Like Xu
authored and
bhe4
committed
KVM: x86/svm/pmu: Add AMD PerfMonV2 support

Like Xu
authored and
bhe4
committed
KVM: x86/cpuid: Add AMD CPUID ExtPerfMonAndDbg leaf 0x80000022

Like Xu
authored and
bhe4
committed
x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled

kimphillamd
authored and
bhe4
committed
KVM: x86: Acquire SRCU read lock when handling fastpath MSR writes

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Truncate counter value to allowed width on write

Roman Kagan
authored and
bhe4
committed
KVM: x86: Get CPL directly when checking if loaded vCPU is in kernel mode

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: fix masking logic for MSR_CORE_PERF_GLOBAL_CTRL

bonzini
authored and
bhe4
committed
KVM: x86/pmu: Zero out pmu->all_valid_pmc_idx each time it's refreshed

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: WARN and bug the VM if PMU is refreshed after vCPU has run

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Zero out PMU metadata on AMD if PMU is disabled

sean-jc
authored and
bhe4
committed
KVM: x86/pmu: Fix type length error when reading pmu->fixed_ctr_ctrl

mzhang3579
authored and
bhe4
committed
KVM: x86/pmu: Synthesize at most one PMI per VM-exit

jsmattsonjr
authored and
bhe4
committed
KVM: x86: Use actual kvm_cpuid.base for clearing KVM_FEATURE_PV_UNHALT

vittyvk
authored and
bhe4
committed
KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64

Like Xu
authored and
bhe4
committed
KVM: x86/pmu: Disable support for adaptive PEBS

sean-jc
authored and
bhe4
committed
KVM: x86: Fix errant brace in KVM capability handling

Ben Gardon
authored and
bhe4
committed
KVM: x86/cpuid: generalize kvm_update_kvm_cpuid_base() and also capture limit

Paul Durrant
authored and
bhe4
committed
KVM: x86: Introduce __kvm_get_hypervisor_cpuid() helper

vittyvk
authored and
bhe4
committed
KVM: x86/cpuid: Refactor host/guest CPU model consistency check

Like Xu
authored and
bhe4
committed
iommu/amd: Update struct iommu_dev_data definition

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce pci segment structure

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment device table

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment rlookup table

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment irq_lookup_table

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment dev_data_list

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment old_dev_tbl_cpy

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment alias_table

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment unity map list

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment last_bdf

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment device table size

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment alias table size

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce per PCI segment rlookup table size

hegdevasant
authored and
bhe4
committed
iommu/amd: Convert to use per PCI segment irq_lookup_table

hegdevasant
authored and
bhe4
committed
iommu/amd: Convert to use rlookup_amd_iommu helper function

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update irq_remapping_alloc to use IOMMU lookup helper function

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Introduce struct amd_ir_data.iommu

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update amd_irte_ops functions

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update alloc_irq_table and alloc_irq_index

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Convert to use per PCI segment rlookup_table

hegdevasant
authored and
bhe4
committed
iommu/amd: Update set_dte_entry and clear_dte_entry

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update iommu_ignore_device

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update dump_dte_entry

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update set_dte_irq_entry

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update (un)init_device_table_dma()

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit()

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf]

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Flush upto last_bdf only

hegdevasant
authored and
bhe4
committed
iommu/amd: Introduce get_device_sbdf_id() helper function

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Include PCI segment ID when initialize IOMMU

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Specify PCI segment ID when getting pci device

ssuthiku-amd
authored and
bhe4
committed
iommu/amd: Print PCI segment ID in error log messages

hegdevasant
authored and
bhe4
committed
iommu/amd: Update device_state structure to include PCI seg ID

hegdevasant
authored and
bhe4
committed
iommu/amd: Update amd_iommu_fault structure to include PCI seg ID

hegdevasant
authored and
bhe4
committed
i2c: i801: Add support for Intel Ice Lake PCH-N

andy-shev
authored and
bhe4
committed
i2c: i801: Improve handling of chip-specific feature definitions

hkallweit
authored and
bhe4
committed
i2c: i801: Enlarge device name field in i801_ids table

jhnikula
authored and
bhe4
committed
i2c: i801: Hide Intel Birch Stream SoC TCO WDT

Chiasheng Lee
authored and
bhe4
committed
KVM: x86: Advertise AVX-VNNI-INT8 CPUID to user space

Jiaxi Chen
authored and
bhe4
committed
x86/cpu: Add model number for Intel Clearwater Forest processor

aegl
authored and
bhe4
committed
x86: KVM: Advertise CPUIDs for new instructions in Clearwater Forest

taosu-linux
authored and
bhe4
committed
x86/cpu: Add model number for another Intel Arrow Lake mobile processor

aegl
authored and
bhe4
committed
x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86

aegl
authored and
bhe4
committed
x86/cpu/vfm: Add new macros to work with (vendor/family/model) values

aegl
authored and
bhe4
committed
x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h

aegl
authored and
bhe4
committed
x86/cpu: Switch to new Intel CPU model defines

aegl
authored and
bhe4
committed
x86/cpu/intel: Switch to new Intel CPU model defines

aegl
authored and
bhe4
committed
x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines

andyhhp
authored and
bhe4
committed
perf/x86/intel: Switch to new Intel CPU model defines

aegl
authored and
bhe4
committed
cpufreq: intel_pstate: Support Emerald Rapids OOB mode

spandruvada
authored and
bhe4
committed
cpufreq: intel_pstate: Support Granite Rapids and Sierra Forest OOB mode

spandruvada
authored and
bhe4
committed
cpufreq: intel_pstate: Support Clearwater Forest OOB mode

spandruvada
authored and
bhe4
committed
cpufreq: intel_pstate: Update Balance-performance EPP for Granite Rapids

spandruvada
authored and
bhe4
committed
cpufreq: intel_pstate: Add Granite Rapids support in no-HWP mode

lrq-max
authored and
bhe4
committed
platform/x86: ISST: Add Clearwater Forest to support list

spandruvada
authored and
bhe4
committed
platform/x86/intel/ifs: Add Clearwater Forest to CPU support list

jithu83
authored and
bhe4
committed
powercap: intel_rapl: Sort header files

zhang-rui
authored and
bhe4
committed
powercap: intel_rapl: Introduce APIs for PMU support

zhang-rui
authored and
bhe4
committed
powercap: intel_rapl_tpmi: Enable PMU support

zhang-rui
authored and
bhe4
committed
memblock: use numa_valid_node() helper to check for invalid node ID

rppt
authored and
bhe4
committed
EDAC/i10nm: Add Intel Grand Ridge micro-server support

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Fix some missing error reports on Emerald Rapids

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Fix the loss of saved RRL for HBM pseudo channel 0

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Remove the AMAP register for determing DDR5

qzhuo2
authored and
bhe4
committed
EDAC/i10nm: Add Intel Clearwater Forest server support

qzhuo2
authored and
bhe4
committed
EDAC/{i10nm,skx,skx_common}: Support UV systems

Kyle Meyer
authored and
bhe4
committed
EDAC/i10nm: Explicitly set the modes of the RRL register sets

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Structure the per-channel RRL registers

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Refactor enable_retry_rd_err_log()

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Refactor show_retry_rd_err_log()

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Add RRL support for Intel Granite Rapids server

qzhuo2
authored and
bhe4
committed
EDAC/i10nm: Fix the bitwise operation between variables of different sizes

qzhuo2
authored and
bhe4
committed
EDAC/i10nm: Add Intel Granite Rapids-D support

qzhuo2
authored and
bhe4
committed
EDAC/{skx_common,i10nm}: Use scnprintf() for safer buffer handling

Wang Haoran
authored and
bhe4
committed
intel_idle: add Granite Rapids Xeon D support

dedekind
authored and
bhe4
committed
intel_idle: add Clearwater Forest SoC support

dedekind
authored and
bhe4
committed
perf/x86/intel/uncore: Clean up func_id

Kan Liang
authored and
bhe4
committed
perf/x86/intel/uncore: Support more units on Granite Rapids

Kan Liang
authored and
bhe4
committed
perf vendor events: Add Clearwaterforest events

captain5050
authored and
bhe4
committed
perf/x86/intel/uncore: Switch to new Intel CPU model defines

aegl
authored and
bhe4
committed
perf/x86/intel/uncore: Add Clearwater Forest support

Kan Liang
authored and
bhe4
committed
perf/x86/intel/uncore: Support MSR portal for discovery tables

Kan Liang
authored and
bhe4
committed
perf/x86/intel/uncore: Support customized MMIO map size

Kan Liang
authored and
bhe4
committed

Commits on Oct 28, 2025

perf/x86/intel: Use the common uarch name for the shared functions

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Factor out the initialization code for SPR

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Factor out the initialization code for ADL e-core

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Apply the common initialization code for ADL

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Clean up the hybrid CPU type handling code

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Add common intel_pmu_init_hybrid()

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Fix broken fixed event constraints extension

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Support the PEBS event mask

Kan Liang
authored and
bhe4
committed
perf/x86: Support counter mask

Kan Liang
authored and
bhe4
committed
perf/x86: Add Lunar Lake and Arrow Lake support

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Rename model-specific pebs_latency_data functions

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Support new data source for Lunar Lake

Kan Liang
authored and
bhe4
committed
perf/x86: Add config_mask to represent EVENTSEL bitmask

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Support PERFEVTSEL extension

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Support Perfmon MSRs aliasing

Kan Liang
authored and
bhe4
committed
perf/x86/intel: Add PMU support for Clearwater Forest

Dapeng Mi
authored and
bhe4
committed
perf/x86/intel: Parse CPUID archPerfmonExt leaves for non-hybrid CPUs

Dapeng Mi
authored and
bhe4
committed
perf/x86/intel: Introduce pairs of PEBS static calls

Dapeng Mi
authored and
bhe4
committed
x86,fs/resctrl: Remove inappropriate references to cacheinfo in the resctrl subsystem

beckwen
authored and
bhe4
committed
temp patch for upstream commit

beckwen
authored and
bhe4
committed
perf/x86/intel/uncore: Add events for Intel SPR IMC PMU

Stephane Eranian
authored and
bhe4
committed

Commits on Nov 5, 2025

perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap()

Dapeng Mi
authored and
bhe4
committed
perf/x86/intel/cstate: Add Clearwater Forrest support

zhenyw
authored and
bhe4
committed
add the unified config.velinux for test
bhe4
committed