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Backport cstate PMU for CWF #107

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662bba3
perf/x86/intel/cstate: Switch to new Intel CPU model defines
aegl Apr 24, 2024
ef174fe
perf/x86/intel: Add missing MODULE_DESCRIPTION() lines
May 30, 2024
9172380
perf/x86/intel/cstate: Add pkg C2 residency counter for Sierra Forest
zhenyw Jul 17, 2024
1486bd9
perf/x86/intel/cstate: Add Clearwater Forest support
ZideChen0 Oct 23, 2025
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151 changes: 77 additions & 74 deletions arch/x86/events/intel/cstate.c
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@
* perf code: 0x00
* Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL,
* KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL,
* RPL,SPR,MTL
* RPL,SPR,MTL,SRF
* Scope: Package (physical package)
* MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter.
* perf code: 0x01
Expand Down Expand Up @@ -113,6 +113,7 @@
#include "../perf_event.h"
#include "../probe.h"

MODULE_DESCRIPTION("Support for Intel cstate performance events");
MODULE_LICENSE("GPL");

#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format) \
Expand Down Expand Up @@ -683,85 +684,87 @@ static const struct cstate_model srf_cstates __initconst = {
.core_events = BIT(PERF_CSTATE_CORE_C1_RES) |
BIT(PERF_CSTATE_CORE_C6_RES),

.pkg_events = BIT(PERF_CSTATE_PKG_C6_RES),
.pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) |
BIT(PERF_CSTATE_PKG_C6_RES),

.module_events = BIT(PERF_CSTATE_MODULE_C6_RES),
};


static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhm_cstates),

X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhm_cstates),

X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snb_cstates),

X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &snb_cstates),

X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &snb_cstates),

X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hswult_cstates),

X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &slm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &slm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &slm_cstates),

X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &snb_cstates),

X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &snb_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &snb_cstates),

X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &hswult_cstates),
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &hswult_cstates),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &hswult_cstates),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &hswult_cstates),

X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnl_cstates),

X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_cstates),

X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &srf_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &grr_cstates),

X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &icx_cstates),

X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &adl_cstates),
X86_MATCH_VFM(INTEL_NEHALEM, &nhm_cstates),
X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_cstates),
X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhm_cstates),

X86_MATCH_VFM(INTEL_WESTMERE, &nhm_cstates),
X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_cstates),
X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhm_cstates),

X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_cstates),
X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snb_cstates),

X86_MATCH_VFM(INTEL_IVYBRIDGE, &snb_cstates),
X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &snb_cstates),

X86_MATCH_VFM(INTEL_HASWELL, &snb_cstates),
X86_MATCH_VFM(INTEL_HASWELL_X, &snb_cstates),
X86_MATCH_VFM(INTEL_HASWELL_G, &snb_cstates),

X86_MATCH_VFM(INTEL_HASWELL_L, &hswult_cstates),

X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &slm_cstates),
X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &slm_cstates),
X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &slm_cstates),

X86_MATCH_VFM(INTEL_BROADWELL, &snb_cstates),
X86_MATCH_VFM(INTEL_BROADWELL_D, &snb_cstates),
X86_MATCH_VFM(INTEL_BROADWELL_G, &snb_cstates),
X86_MATCH_VFM(INTEL_BROADWELL_X, &snb_cstates),

X86_MATCH_VFM(INTEL_SKYLAKE_L, &snb_cstates),
X86_MATCH_VFM(INTEL_SKYLAKE, &snb_cstates),
X86_MATCH_VFM(INTEL_SKYLAKE_X, &snb_cstates),

X86_MATCH_VFM(INTEL_KABYLAKE_L, &hswult_cstates),
X86_MATCH_VFM(INTEL_KABYLAKE, &hswult_cstates),
X86_MATCH_VFM(INTEL_COMETLAKE_L, &hswult_cstates),
X86_MATCH_VFM(INTEL_COMETLAKE, &hswult_cstates),

X86_MATCH_VFM(INTEL_CANNONLAKE_L, &cnl_cstates),

X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_cstates),
X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_cstates),

X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_TREMONT, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &glm_cstates),
X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_cstates),
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &srf_cstates),
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &grr_cstates),
X86_MATCH_VFM(INTEL_ATOM_DARKMONT_X, &srf_cstates),

X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_cstates),
X86_MATCH_VFM(INTEL_ICELAKE, &icl_cstates),
X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_cstates),
X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_cstates),
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &icx_cstates),
X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &icx_cstates),
X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &icx_cstates),
X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &icx_cstates),

X86_MATCH_VFM(INTEL_TIGERLAKE_L, &icl_cstates),
X86_MATCH_VFM(INTEL_TIGERLAKE, &icl_cstates),
X86_MATCH_VFM(INTEL_ROCKETLAKE, &icl_cstates),
X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_cstates),
X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_cstates),
X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_cstates),
X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_cstates),
X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_cstates),
X86_MATCH_VFM(INTEL_METEORLAKE, &adl_cstates),
X86_MATCH_VFM(INTEL_METEORLAKE_L, &adl_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
Expand Down
1 change: 1 addition & 0 deletions arch/x86/events/intel/uncore.c
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Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ static struct event_constraint uncore_constraint_fixed =
struct event_constraint uncore_constraint_empty =
EVENT_CONSTRAINT(0, 0, 0);

MODULE_DESCRIPTION("Support for Intel uncore performance events");
MODULE_LICENSE("GPL");

int uncore_pcibus_to_dieid(struct pci_bus *bus)
Expand Down