Skip to content

AltairZ80: The Big Beautiful PR #491

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
deltecent wants to merge 1 commit into from
Closed

AltairZ80: The Big Beautiful PR #491

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 4 additions & 2 deletions AltairZ80/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,10 @@ add_simulator(altairz80
SOURCES
altairz80_cpu.c
altairz80_cpu_nommu.c
wd179x.c
s100_hdc1001.c
s100_sbc200.c
s100_vfii.c
s100_tuart.c
s100_dazzler.c
s100_jair.c
Expand Down Expand Up @@ -63,8 +67,6 @@ add_simulator(altairz80
s100_scp300f.c
s100_tarbell.c
s100_tdd.c
wd179x.c
s100_hdc1001.c
s100_if3.c
s100_adcs6.c
m68k/m68kcpu.c
Expand Down
46 changes: 40 additions & 6 deletions AltairZ80/altairz80_cpu.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -572,6 +572,8 @@ static MTAB cpu_mod[] = {
NULL, NULL, "Sets the RAM type to Cromemco RAM for 8080 / Z80 / 8086" },
{ MTAB_XTD | MTAB_VDV, 4, NULL, "B810", &cpu_set_ramtype,
NULL, NULL, "Sets the RAM type AB Digital Design B810 8080 / Z80 / 8086"},
{ MTAB_XTD | MTAB_VDV, 5, NULL, "ERAM", &cpu_set_ramtype,
NULL, NULL, "Sets the RAM type to SD Systems ERAM for 8080 / Z80 / 8086"},
{ MTAB_VDV, 4, NULL, "4KB", &cpu_set_size,
NULL, NULL, "Sets the RAM size to 4KB for 8080 / Z80 / 8086" },
{ MTAB_VDV, 8, NULL, "8KB", &cpu_set_size,
Expand Down Expand Up @@ -734,7 +736,8 @@ const char* handlerNameForPort(const int32 port) {
#define RAM_TYPE_VRAM 2 /* Vector Graphic RAM card */
#define RAM_TYPE_CRAM 3 /* Cromemco RAM card */
#define RAM_TYPE_B810 4 /* AB Digital Design B810 RAM card */
#define MAX_RAM_TYPE RAM_TYPE_B810
#define RAM_TYPE_ERAM 5 /* SD Systems ExpandoRAM */
#define MAX_RAM_TYPE RAM_TYPE_ERAM

static int32 ramtype = RAM_TYPE_AZ80;

Expand Down Expand Up @@ -6760,7 +6763,7 @@ const static CPUFLAG *cpuflags[NUM_CHIP_TYPE] = { cpuflags8080, cpuflagsZ80,
cpuflags8086, cpuflagsM68K, };

/* needs to be set for each ramtype <= MAX_RAM_TYPE */
static const char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM", "B810" };
static const char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM", "B810", "ERAM" };

static const char* m68kVariantToString[] = {
"INVALID",
Expand Down Expand Up @@ -7000,6 +7003,13 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) {
sim_printf("Invalid bank select 0x%02x for B810\n", data);
}
break;
case RAM_TYPE_ERAM:
if (data < 8) {
setBankSelect(data);
} else {
sim_printf("Invalid bank select 0x%02x for ERAM\n", data);
}
break;
case RAM_TYPE_AZ80:
default:
break;
Expand Down Expand Up @@ -7143,6 +7153,11 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, CONST char *cptr, void *d
sim_printf("Unmapping AB Digital Design B810 RAM\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", TRUE);
break;
case RAM_TYPE_ERAM:
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
sim_printf("Unmapping SD Systems ExpandoRAM\n");
sim_map_resource(0xff, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", TRUE);
break;
case 0:
default:
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
Expand Down Expand Up @@ -7171,6 +7186,11 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, CONST char *cptr, void *d
sim_printf("AB Digital Design B810 RAM Selected\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", FALSE);
break;
case RAM_TYPE_ERAM:
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
sim_printf("SD Systems ExpandoRAM Selected\n");
sim_map_resource(0xff, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", FALSE);
break;
case 0:
default:
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
Expand Down Expand Up @@ -7521,11 +7541,21 @@ static t_stat cpu_hex_load(FILE *fileref, CONST char *cptr, CONST char *fnam, in
char linebuf[1024], datastr[1024], *bufptr;
int32 bytecnt, rectype, databyte, chksum, line = 0, cnt = 0;
uint32 makeROM = FALSE;
t_addr addr, org = 0;
t_addr addr, start = 0, offset = 0, org = -1;
CONST char *result;

get_glyph(cptr, gbuf, 0);
if (strcmp(gbuf, "ROM") == 0) {
makeROM = TRUE;
} else {
start = strtotv(cptr, &result, 16) & ADDRMASKEXTENDED;
if (cptr != result)
org = start;
while (isspace(*result))
result++;
get_glyph(result, gbuf, 0);
if (strcmp(gbuf, "ROM") == 0)
makeROM = TRUE;
}

while (!feof(fileref)) {
Expand Down Expand Up @@ -7556,16 +7586,20 @@ static t_stat cpu_hex_load(FILE *fileref, CONST char *cptr, CONST char *fnam, in
datastr[sizeof(datastr) - 1] = '\0';

if ((rectype == 0) && (bytecnt > 0) && (addr+bytecnt <= MAXMEMORY)) {
if (cnt == 0)
org = addr;
if (cnt == 0) {
if (org == -1)
org = addr;
else
offset = org - addr;
}

do {
if (sscanf(bufptr, "%2x", &databyte) != 1) {
return sim_messagef(SCPE_IERR, "Hex file format error at line %d\n", line);
}
bufptr += 2;

PutBYTEasROMorRAM(addr++, databyte, makeROM);
PutBYTEasROMorRAM(offset+addr++, databyte, makeROM);

chksum += databyte;
cnt++;
Expand Down
5 changes: 5 additions & 0 deletions AltairZ80/altairz80_sys.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -87,12 +87,14 @@ extern DEVICE jairs1_dev;
extern DEVICE jairp_dev;
extern DEVICE mmd_dev;
extern DEVICE mmdm_dev;
extern DEVICE sbc200_dev;
extern DEVICE sol20_dev;
extern DEVICE sol20k_dev;
extern DEVICE sol20t_dev;
extern DEVICE sol20s_dev;
extern DEVICE sol20p_dev;
extern DEVICE vdm1_dev;
extern DEVICE vfii_dev;

extern DEVICE cromfdc_dev;
extern DEVICE wd179x_dev;
Expand Down Expand Up @@ -166,6 +168,9 @@ DEVICE *sim_devices[] = {
&djhdc_dev,
&mmd_dev,
&mmdm_dev,
/* SD Systems */
&sbc200_dev,
&vfii_dev,
/* Processor Technology Devices */
&sol20_dev,
&sol20k_dev,
Expand Down
Loading
Loading