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Is it possible to simulate large VHDL netlists in nvc? #1331

@mik1234mc

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@mik1234mc

Hello Nick,

I tried to simulate quite large synthesis netlist without success. nvc draws memory till the limit of my machine. -M and -H does not seem to work for me. Is there an indication how much RAM would be needed for such a design?

nvc -H4096m -M4096m --messages=compact -a --relaxed fftmain.vhdl
nvc -H4096m -M4096m --messages=compact -e -V fftmain 
note: initialising [25ms +34208kB]
note: loading top-level unit [63ms +48160kB]
^C

Michael

fftmain.zip

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