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  • Arizona State University
  • Tempe

Achievements

Achievement: Pair Extraordinairex2Achievement: QuickdrawAchievement: Pull Sharkx2Achievement: YOLO

Achievements

Achievement: Pair Extraordinairex2Achievement: QuickdrawAchievement: Pull Sharkx2Achievement: YOLO

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naman-ranka/README.md

Naman Ranka

MS in Computer Engineering @ Arizona State University
I build things end-to-end — from SystemVerilog processors to production web apps.

LinkedIn · Trezzit · namanranka14@gmail.com

Featured Projects

Trezzit · Try the app

Reimagining personal finance around item-level data rather than transactions — starting from shared expenses.

React 19 PWA, Django REST Framework, PostgreSQL, Redis, Celery. AI receipt scanning with a two-pass LLM pipeline across 4 providers. Multi-currency, push notifications, 995+ automated tests, 60+ API endpoints.

SiliconCrew · Active research

Autonomous LLM agent for hardware design — natural language to GDSII.

Generates Verilog, verifies via simulation, debugs by reading waveforms, synthesizes through OpenROAD (SkyWater 130nm, ASAP7 7nm). 21-tool LangGraph agent with Next.js UI and full MCP server for Claude Desktop/VS Code.

Other Work

Order Management System — Django app powering a wholesale jewelry business. 18,000+ orders processed, 3 user portals, WhatsApp Business API automation. Reverse-engineered a third-party ERP via direct SQL (no API available). Private repo.

Intel Open Source — Sensor analytics microservice merged into Intel's automated-self-checkout repo. Python, Docker, MQTT/Kafka, Grafana.

Hackathon wins — AdaptED AI (AI learning platform), HEAL.AI (healthcare bill analyzer, won Devlabs + 2nd place), TwinGenius (Honeywell, NLP-to-digital-twin)

Hardware & Embedded
  • 5-Stage Pipelined MIPS Processor — 33 instructions, 12-path forwarding, CAM instruction cache, LL/SC atomics. SystemVerilog.
  • Raspberry Pi Autonomous Bot — Lane following (OpenCV + PID), 4 object detectors, Arduino I2C integration. Bachelor's capstone.
  • SiliconCrew bridges both worlds — LLM agents generating and verifying RTL through the full ASIC flow.
AI / ML
  • Trezzit — Two-pass receipt OCR pipeline with provider abstraction (Gemini, OpenAI, Claude, Grok), image dedup, semantic validation
  • HEAL.AI — RAG pipeline from scratch: document chunking, vector embeddings (768-dim), cosine similarity retrieval
  • SiliconCrew — 21-tool LangGraph ReAct agent with iterative waveform-based debugging
  • Udacity Self-Driving Car Nanodegree — Object detection, 3D LiDAR, EKF, ICP localization from scratch (SVD), motion planning, PID control. Certificate earned.

Python TypeScript JavaScript C++ SystemVerilog Django React FastAPI Next.js LangGraph PostgreSQL Redis Docker MCP Protocol OpenROAD

Pinned Loading

  1. siliconcrew siliconcrew Public

    Autonomous LLM agent for hardware design — natural language to GDSII via Verilog generation, simulation, and OpenROAD synthesis

    Python

  2. Trezzit Trezzit Public

    Landing page for Trezzit

    HTML

  3. naman-ranka naman-ranka Public

    Profile README

  4. adaptedge-assignment-helper adaptedge-assignment-helper Public

    AI-powered adaptive learning platform — hackathon winner, personalized assignment generation with Gemini

    TypeScript 2

  5. HEAL_AI HEAL_AI Public

    AI healthcare financial assistant — insurance document parsing, bill overcharge detection, RAG pipeline with vector embeddings

    TypeScript 2

  6. mips-processor mips-processor Public

    5-stage pipelined MIPS processor in SystemVerilog — 33 instructions, 12-path forwarding, CAM instruction cache, LL/SC atomics

    SystemVerilog