Digital VLSI SoC - Design and Planning

In this workshop, I learned and shared my lab work on working with OpenLANE RTL2GDS digital design suite, NGSpice for Characterization, Magic for Layout and Floor planning, and discovered a few hands-on processes involved in the Physical Design of a SoC. Through this workshop, I performed CMOS transient analysis, Layout and Characterization of the Inverter Cell using NgSPICE Simulation, and exercises in the Magic Design Window, to find and fix errors in Magic for a few design files. The sources used for this workshop are:

• http://opencircuitdesign.com/magic/
• https://skywater-pdk.readthedocs.io/en/main/rules/periphery.html