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karthikeyan-designs/README.md

👋 Hi there, I'm Karthikeyan!

I'm an aspiring Digital Design and FPGA Engineer passionate about RTL design, FPGA systems, and VLSI circuit design.

🔧 Areas of Interest

  • RTL Design and FPGA Prototyping
  • HPS–FPGA SoC Systems
  • CMOS Circuit Design and SPICE Simulation
  • Open-source EDA Tools

🛠️ Tools & Technologies

• Verilog
• Quartus Prime
• Platform Designer
• MATLAB
• Cadence Virtuoso
• eSim
• NGSpice
• Magic VLSI
• SKY130 PDK
• OpenLANE

🌱 Currently Learning

• FPGA-based signal processing • Hardware acceleration techniques

⚡ Let's wire ideas into silicon!

Profile Views

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  1. soc-physical-design-openlane soc-physical-design-openlane Public

    This repository documents the complete RTL-to-GDSII physical design implementation of the picorv32a RISC-V processor core using open-source EDA tools. The project was completed as part of the Digit…

  2. Low-Power-Approximate-Adder-Design-and-Simulation-in-Cadence-Virtuoso-180nm-Technology- Low-Power-Approximate-Adder-Design-and-Simulation-in-Cadence-Virtuoso-180nm-Technology- Public

    Designed and simulated a low-power approximate adder using Cadence Virtuoso at 180nm CMOS

    1

  3. CMOS-Circuit-Analysis-using-SKY130-PDK CMOS-Circuit-Analysis-using-SKY130-PDK Public

    CMOS digital circuit characterization (IV curves, transient analysis, delay, power, noise margin, pre-layout and post-layout) using SKY130 PDK with NgSpice, Xschem, and Magic.

  4. eSim eSim Public

    Forked from FOSSEE/eSim

    This repository contain source code for new flow of FreeEDA now know as eSim

    Python 1