LogicGates

Logic gates simple simulation with console input user interface

As a term project for programming in c++

Consists of:

Graph

• general simple multigraph
  • adding verteces, edges with arbitary values
  • cycle test
  • accessbillity test

Gates

• basic logic gates:

  • NOT
  • AND
  • OR
  • XOR
  • NAND
  • NOR
  • XNOR

• other gates

  • Input
  • Output
  • Blank
  • ConstIn0
  • ConstIn1
  • Double

• User defined gates

  • gates made of basic or reusing user defined gates
  • simulating of intern gate

Workbench:

• creating new circuit(UnderConstruction)

  • add gate
  • connect gates
  • add input gates(the final input for the binary number)
  • add output gates(the final output number)
  • use constructed

• calculation logic function for binnary input(Constructed)

  • set input (Calculating)
  • read output (Calculated)
  • construct the gate from actual bench

WorkbenchTUI

• reading gates from file (file format: example.txt)
• set inputs to constructed gates

Examples of gates: