GitHub - jkirschner/ultra-efficient-adc: An ultra-efficient ADC design (schematic capture and layout) based on H. Y. Yang and R. Sarpeshkar. "A Bio-Inspired Ultra-Energy-Efficient Analog-to-Digital Converter for Biomedical Applications." IEEE Transactions on Circuits and Systems-I; Regular Papers, vol. 53, no. 11, pp. 2349-2356, Nov. 2006.

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 125 Commits
Layout		Layout
.gitignore		.gitignore
AnalogSwitch.spice		AnalogSwitch.spice
FlipFlop.asc		FlipFlop.asc
FlipFlop.asy		FlipFlop.asy
FlipFlopReset_FE.asy		FlipFlopReset_FE.asy
FlipFlop_test.asc		FlipFlop_test.asc
Inverter.asc		Inverter.asc
Inverter.asy		Inverter.asy
InverterInputs.asc		InverterInputs.asc
InverterInputs.asy		InverterInputs.asy
NAND.asc		NAND.asc
NAND.asy		NAND.asy
NAND3.asc		NAND3.asc
NAND3.asy		NAND3.asy
NOR.asc		NOR.asc
NOR.asy		NOR.asy
OneBitCounter_DFF.asc		OneBitCounter_DFF.asc
PulseWidthControl_LDS.asc		PulseWidthControl_LDS.asc
PulseWidthControl_LDS.asy		PulseWidthControl_LDS.asy
README.md		README.md
ResetFlipFlop_High_LDS.asc		ResetFlipFlop_High_LDS.asc
ResetFlipFlop_High_LDS.asy		ResetFlipFlop_High_LDS.asy
ResetFlipFlop_Low_LDS.asc		ResetFlipFlop_Low_LDS.asc
ResetFlipFlop_Low_LDS.asy		ResetFlipFlop_Low_LDS.asy
ResetFlipFlop_Low_LDS.net		ResetFlipFlop_Low_LDS.net
SPDT_1.asc		SPDT_1.asc
SPDT_1.asy		SPDT_1.asy
SPDT_2.asc		SPDT_2.asc
SPDT_2.asy		SPDT_2.asy
SPDTlvs.asc		SPDTlvs.asc
SPDTlvs.asy		SPDTlvs.asy
SPDTlvs.net		SPDTlvs.net
T_FlipFlopReset_FE.asc		T_FlipFlopReset_FE.asc
T_FlipFlopReset_FE.asy		T_FlipFlopReset_FE.asy
TransmissionGate.asc		TransmissionGate.asc
TransmissionGate.asy		TransmissionGate.asy
adc_test.asc		adc_test.asc
analogSwitchLDS.asc		analogSwitchLDS.asc
analogSwitchLDS.net		analogSwitchLDS.net
analog_switch_current_steer.asc		analog_switch_current_steer.asc
analog_switch_current_steer.asy		analog_switch_current_steer.asy
analog_switch_current_steer_test.asc		analog_switch_current_steer_test.asc
biasLVS.asc		biasLVS.asc
biasLVS.net		biasLVS.net
comparator.asc		comparator.asc
comparator.asy		comparator.asy
comparatorLVS.asc		comparatorLVS.asc
comparatorLVS.net		comparatorLVS.net
comparatorPreampLVS.asc		comparatorPreampLVS.asc
comparator_gainlatch.asc		comparator_gainlatch.asc
comparator_gainlatch.asy		comparator_gainlatch.asy
comparator_gainlatch_LDS.asc		comparator_gainlatch_LDS.asc
comparator_gainlatch_LDS.asy		comparator_gainlatch_LDS.asy
comparator_gainlatch_LDS.net		comparator_gainlatch_LDS.net
comparator_gainlatch_sim.asc		comparator_gainlatch_sim.asc
comparator_preamp.asc		comparator_preamp.asc
comparator_preamp.asy		comparator_preamp.asy
comparator_preamp_sim.asc		comparator_preamp_sim.asc
comparator_test.asc		comparator_test.asc
doubleComparatorPreampLVS.asc		doubleComparatorPreampLVS.asc
doubleComparatorPreampLVS.asy		doubleComparatorPreampLVS.asy
doubleComparatorPreampLVS.net		doubleComparatorPreampLVS.net
doublebiasLVS.asc		doublebiasLVS.asc
doublebiasLVS.asy		doublebiasLVS.asy
doublebiasLVS.net		doublebiasLVS.net
engr3426.sub		engr3426.sub
highResetFlipFlop.asc		highResetFlipFlop.asc
highResetFlipFlop.asy		highResetFlipFlop.asy
highResetFlipFlop_test.asc		highResetFlipFlop_test.asc
inverterLVS.asc		inverterLVS.asc
inverterLVS.net		inverterLVS.net
lsb_registers.asc		lsb_registers.asc
lsb_registers.asy		lsb_registers.asy
lsb_registers_test.asc		lsb_registers_test.asc
msb_registers.asc		msb_registers.asc
msb_registers.asy		msb_registers.asy
msb_registers_test.asc		msb_registers_test.asc
nand3LVS.asc		nand3LVS.asc
nand3LVS.asy		nand3LVS.asy
nand3LVS.net		nand3LVS.net
nandLVS.asc		nandLVS.asc
nandLVS.asy		nandLVS.asy
nandLVS.net		nandLVS.net
norLVS.asc		norLVS.asc
norLVS.asy		norLVS.asy
norLVS.net		norLVS.net
powerOnReset.asc		powerOnReset.asc
pulse_width_control.asc		pulse_width_control.asc
pulse_width_control.asy		pulse_width_control.asy
pulse_width_control_test.asc		pulse_width_control_test.asc
stateMachineLVS.asc		stateMachineLVS.asc
stateMachineLVS.net		stateMachineLVS.net
state_machine_test.asc		state_machine_test.asc

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An ultra-efficient ADC design (schematic capture and layout) based on H. Y. Yang and R. Sarpeshkar. "A Bio-Inspired Ultra-Energy-Efficient Analog-to-Digital Converter for Biomedical Applications." IEEE Transactions on Circuits and Systems-I; Regular Papers, vol. 53, no. 11, pp. 2349-2356, Nov. 2006.