Fix MXFP4 8w PP kernel correctness #1059
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Signed-off-by: Aurore De Spirlet <aurore.despirlet@amd.com>
adedespirlet
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Can you also add it to an existing test or add a new test so this is tracked on the ci? 7.1_schedule is not run on th e ci. |
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This PR:
adds _get_8wave_shape_from_block() which adjusts wave_shape based on tile size (if tile size ==32 make sure wave shape along that dimension is not above 2)
adds an extra barrier (double barrier) to the 8 wave PP kernel with B preshuffled and w/o . This makes sure we never have a memory dependency issue between the two cluster. Theoretically proven that it is not possible to have a race and thus works on all macro tile sizes.
adds dynamic flat support for the 8 wave PP without B preshuffling