Password-Door-Lock-System

Verilog HDL project for a password-based door locking system using FPGA.

Password Based Door Lock System

This project is an FPGA-based password-protected door lock system implemented using Verilog HDL. The door unlocks only when the correct password is entered. The system also supports password changes.

Features:

• Password-based security for door locking
• Modes: Door Lock, Door Unlock, Password Change
• Verilog HDL code compatible with FPGA platforms
• FSM-based design

Components:

• Verilog HDL
• FPGA Board
• Clock, Reset, Door Sensor

How It Works:

• Users can enter a password to unlock the door.
• The system verifies the password and opens or closes the door accordingly.
• A reset mechanism resets the system to its default state.

Code:

The Verilog HDL code is included in the door_system.v file.

Report:

The full project report with a detailed explanation of the system is included in fpga_report.pdf.