feat: add esp32

esp32/FreeRTOS.go

@@ -0,0 +1,193 @@
+package freertos
+
+import (
+	"github.com/goplus/lib/c"
+	_ "unsafe"
+)
+
+const ConfigUSE_C_RUNTIME_TLS_SUPPORT = 1
+const INCLUDE_xQueueGetMutexHolder = 0
+const ConfigUSE_DAEMON_TASK_STARTUP_HOOK = 0
+const ConfigUSE_APPLICATION_TASK_TAG = 0
+const ConfigUSE_ALTERNATIVE_API = 0
+const ConfigASSERT_DEFINED = 1
+const ConfigPRECONDITION_DEFINED = 0
+const ConfigUSE_MINI_LIST_ITEM = 1
+const ConfigGENERATE_RUN_TIME_STATS = 0
+const ConfigUSE_MALLOC_FAILED_HOOK = 0
+const ConfigEXPECTED_IDLE_TIME_BEFORE_SLEEP = 2
+const ConfigINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS = 0
+const ConfigUSE_STATS_FORMATTING_FUNCTIONS = 0
+const ConfigUSE_TRACE_FACILITY = 0
+const ConfigUSE_POSIX_ERRNO = 0
+const ConfigUSE_SB_COMPLETED_CALLBACK = 0
+const ConfigINITIAL_TICK_COUNT = 0
+const ConfigUSE_TASK_FPU_SUPPORT = 1
+const ConfigENABLE_MPU = 0
+const ConfigENABLE_FPU = 1
+const ConfigENABLE_MVE = 0
+const ConfigENABLE_TRUSTZONE = 1
+const ConfigRUN_FREERTOS_SECURE_ONLY = 0
+const ConfigRUN_ADDITIONAL_TESTS = 0
+
+/*
+ * In line with software engineering best practice, FreeRTOS implements a strict
+ * data hiding policy, so the real structures used by FreeRTOS to maintain the
+ * state of tasks, queues, semaphores, etc. are not accessible to the application
+ * code.  However, if the application writer wants to statically allocate such
+ * an object then the size of the object needs to be known.  Dummy structures
+ * that are guaranteed to have the same size and alignment requirements of the
+ * real objects are used for this purpose.  The dummy list and list item
+ * structures below are used for inclusion in such a dummy structure.
+ */
+type XSTATICLISTITEM struct {
+	XDummy2  TickTypeT
+	PvDummy3 [4]c.Pointer
+}
+type StaticListItemT XSTATICLISTITEM
+
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
+
+type XSTATICMINILISTITEM struct {
+	XDummy2  TickTypeT
+	PvDummy3 [2]c.Pointer
+}
+type StaticMiniListItemT XSTATICMINILISTITEM
+
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
+
+type XSTATICLIST struct {
+	UxDummy2 UBaseTypeT
+	PvDummy3 c.Pointer
+	XDummy4  StaticMiniListItemT
+}
+type StaticListT XSTATICLIST
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the Task structure used internally by
+ * FreeRTOS is not accessible to application code.  However, if the application
+ * writer wants to statically allocate the memory required to create a task then
+ * the size of the task object needs to be known.  The StaticTask_t structure
+ * below is provided for this purpose.  Its sizes and alignment requirements are
+ * guaranteed to match those of the genuine structure, no matter which
+ * architecture is being used, and no matter how the values in FreeRTOSConfig.h
+ * are set.  Its contents are somewhat obfuscated in the hope users will
+ * recognise that it would be unwise to make direct use of the structure members.
+ */
+type XSTATICTCB struct {
+	PxDummy1     c.Pointer
+	XDummy3      [2]StaticListItemT
+	UxDummy5     UBaseTypeT
+	PxDummy6     c.Pointer
+	UcDummy7     [16]c.Uint8T
+	XDummyCoreID BaseTypeT
+	PxDummy8     c.Pointer
+	UxDummy12    [2]UBaseTypeT
+	PvDummy15    [2]c.Pointer
+	XDummy17     X_reent
+	UlDummy18    [1]c.Uint32T
+	UcDummy19    [1]c.Uint8T
+	UxDummy20    c.Uint8T
+	UcDummy21    c.Uint8T
+}
+type StaticTaskT XSTATICTCB
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the Queue structure used internally by
+ * FreeRTOS is not accessible to application code.  However, if the application
+ * writer wants to statically allocate the memory required to create a queue
+ * then the size of the queue object needs to be known.  The StaticQueue_t
+ * structure below is provided for this purpose.  Its sizes and alignment
+ * requirements are guaranteed to match those of the genuine structure, no
+ * matter which architecture is being used, and no matter how the values in
+ * FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in the hope
+ * users will recognise that it would be unwise to make direct use of the
+ * structure members.
+ */
+type XSTATICQUEUE struct {
+	PvDummy1 [3]c.Pointer
+	U        struct {
+		PvDummy2 c.Pointer
+	}
+	XDummy3         [2]StaticListT
+	UxDummy4        [3]UBaseTypeT
+	UcDummy5        [2]c.Uint8T
+	UcDummy6        c.Uint8T
+	PvDummy7        c.Pointer
+	XDummyQueueLock PortMUXTYPE
+}
+type StaticQueueT XSTATICQUEUE
+type StaticSemaphoreT StaticQueueT
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the event group structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create an event group then the size of the event group object needs to be
+ * know.  The StaticEventGroup_t structure below is provided for this purpose.
+ * Its sizes and alignment requirements are guaranteed to match those of the
+ * genuine structure, no matter which architecture is being used, and no matter
+ * how the values in FreeRTOSConfig.h are set.  Its contents are somewhat
+ * obfuscated in the hope users will recognise that it would be unwise to make
+ * direct use of the structure members.
+ */
+type XSTATICEVENTGROUP struct {
+	XDummy1              TickTypeT
+	XDummy2              StaticListT
+	UcDummy4             c.Uint8T
+	XDummyEventGroupLock PortMUXTYPE
+}
+type StaticEventGroupT XSTATICEVENTGROUP
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the software timer structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create a software timer then the size of the queue object needs to be known.
+ * The StaticTimer_t structure below is provided for this purpose.  Its sizes
+ * and alignment requirements are guaranteed to match those of the genuine
+ * structure, no matter which architecture is being used, and no matter how the
+ * values in FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in
+ * the hope users will recognise that it would be unwise to make direct use of
+ * the structure members.
+ */
+type XSTATICTIMER struct {
+	PvDummy1 c.Pointer
+	XDummy2  StaticListItemT
+	XDummy3  TickTypeT
+	PvDummy5 c.Pointer
+	PvDummy6 c.Int
+	UcDummy8 c.Uint8T
+}
+type StaticTimerT XSTATICTIMER
+
+/*
+ * In line with software engineering best practice, especially when supplying a
+ * library that is likely to change in future versions, FreeRTOS implements a
+ * strict data hiding policy.  This means the stream buffer structure used
+ * internally by FreeRTOS is not accessible to application code.  However, if
+ * the application writer wants to statically allocate the memory required to
+ * create a stream buffer then the size of the stream buffer object needs to be
+ * known.  The StaticStreamBuffer_t structure below is provided for this
+ * purpose.  Its size and alignment requirements are guaranteed to match those
+ * of the genuine structure, no matter which architecture is being used, and
+ * no matter how the values in FreeRTOSConfig.h are set.  Its contents are
+ * somewhat obfuscated in the hope users will recognise that it would be unwise
+ * to make direct use of the structure members.
+ */
+type XSTATICSTREAMBUFFER struct {
+	UxDummy1               [4]c.SizeT
+	PvDummy2               [3]c.Pointer
+	UcDummy3               c.Uint8T
+	XDummyStreamBufferLock PortMUXTYPE
+}
+type StaticStreamBufferT XSTATICSTREAMBUFFER
+type StaticMessageBufferT StaticStreamBufferT

esp32/FreeRTOSConfig_arch.go

@@ -0,0 +1,11 @@
+package freertos
+
+import _ "unsafe"
+
+const ConfigUSE_PORT_OPTIMISED_TASK_SELECTION = 0
+const ConfigMAX_API_CALL_INTERRUPT_PRIORITY = 0
+const ConfigUSE_NEWLIB_REENTRANT = 1
+const ConfigINCLUDE_FREERTOS_TASK_C_ADDITIONS_H = 1
+const INCLUDE_xTaskDelayUntil = 1
+const INCLUDE_uxTaskGetStackHighWaterMark2 = 1
+const INCLUDE_vTaskDelayUntil = 1

esp32/adc_channel.go

@@ -0,0 +1,44 @@
+package freertos
+
+import _ "unsafe"
+
+const ADC1_GPIO1_CHANNEL = 0
+const ADC1_CHANNEL_0_GPIO_NUM = 1
+const ADC1_GPIO2_CHANNEL = 1
+const ADC1_CHANNEL_1_GPIO_NUM = 2
+const ADC1_GPIO3_CHANNEL = 2
+const ADC1_CHANNEL_2_GPIO_NUM = 3
+const ADC1_GPIO4_CHANNEL = 3
+const ADC1_CHANNEL_3_GPIO_NUM = 4
+const ADC1_GPIO5_CHANNEL = 4
+const ADC1_CHANNEL_4_GPIO_NUM = 5
+const ADC1_GPIO6_CHANNEL = 5
+const ADC1_CHANNEL_5_GPIO_NUM = 6
+const ADC1_GPIO7_CHANNEL = 6
+const ADC1_CHANNEL_6_GPIO_NUM = 7
+const ADC1_GPIO8_CHANNEL = 7
+const ADC1_CHANNEL_7_GPIO_NUM = 8
+const ADC1_GPIO9_CHANNEL = 8
+const ADC1_CHANNEL_8_GPIO_NUM = 9
+const ADC1_GPIO10_CHANNEL = 9
+const ADC1_CHANNEL_9_GPIO_NUM = 10
+const ADC2_GPIO11_CHANNEL = 0
+const ADC2_CHANNEL_0_GPIO_NUM = 11
+const ADC2_GPIO12_CHANNEL = 1
+const ADC2_CHANNEL_1_GPIO_NUM = 12
+const ADC2_GPIO13_CHANNEL = 2
+const ADC2_CHANNEL_2_GPIO_NUM = 13
+const ADC2_GPIO14_CHANNEL = 3
+const ADC2_CHANNEL_3_GPIO_NUM = 14
+const ADC2_GPIO15_CHANNEL = 4
+const ADC2_CHANNEL_4_GPIO_NUM = 15
+const ADC2_GPIO16_CHANNEL = 5
+const ADC2_CHANNEL_5_GPIO_NUM = 16
+const ADC2_GPIO17_CHANNEL = 6
+const ADC2_CHANNEL_6_GPIO_NUM = 17
+const ADC2_GPIO18_CHANNEL = 7
+const ADC2_CHANNEL_7_GPIO_NUM = 18
+const ADC2_GPIO19_CHANNEL = 8
+const ADC2_CHANNEL_8_GPIO_NUM = 19
+const ADC2_GPIO20_CHANNEL = 9
+const ADC2_CHANNEL_9_GPIO_NUM = 20

esp32/adc_hal.go

@@ -0,0 +1,146 @@
+package freertos
+
+import (
+	"github.com/goplus/lib/c"
+	_ "unsafe"
+)
+
+type AdcHalDmaDescStatusT c.Int
+
+const (
+	ADC_HAL_DMA_DESC_VALID   AdcHalDmaDescStatusT = 0
+	ADC_HAL_DMA_DESC_WAITING AdcHalDmaDescStatusT = 1
+	ADC_HAL_DMA_DESC_NULL    AdcHalDmaDescStatusT = 2
+)
+
+/**
+ * @brief Configuration of the HAL
+ */
+
+type AdcHalDmaConfigT struct {
+	EofDescNum c.Uint32T
+	EofStep    c.Uint32T
+	EofNum     c.Uint32T
+}
+
+/**
+ * @brief Context of the HAL
+ */
+
+type AdcHalDmaCtxT struct {
+	RxDesc        *DmaDescriptorT
+	DescDummyHead DmaDescriptorT
+	CurDescPtr    *DmaDescriptorT
+	EofDescNum    c.Uint32T
+	EofStep       c.Uint32T
+	EofNum        c.Uint32T
+}
+
+type AdcHalDigiCtrlrCfgT struct {
+	AdcPatternLen c.Uint32T
+	AdcPattern    *AdcDigiPatternConfigT
+	SampleFreqHz  c.Uint32T
+	ConvMode      AdcDigiConvertModeT
+	BitWidth      c.Uint32T
+	ClkSrc        AdcContinuousClkSrcT
+	ClkSrcFreqHz  c.Uint32T
+}
+
+/*---------------------------------------------------------------
+                    Digital controller setting
+---------------------------------------------------------------*/
+/**
+ * @brief Initialize the HW
+ *
+ * @param hal Context of the HAL
+ */
+// llgo:link (*AdcHalDmaCtxT).AdcHalDigiInit C.adc_hal_digi_init
+func (recv_ *AdcHalDmaCtxT) AdcHalDigiInit() {
+}
+
+/**
+ * Digital controller deinitialization.
+ *
+ */
+//go:linkname AdcHalDigiDeinit C.adc_hal_digi_deinit
+func AdcHalDigiDeinit()
+
+/**
+ * @brief Initialize the hal context
+ *
+ * @param hal    Context of the HAL
+ * @param config Configuration of the HAL
+ */
+// llgo:link (*AdcHalDmaCtxT).AdcHalDmaCtxConfig C.adc_hal_dma_ctx_config
+func (recv_ *AdcHalDmaCtxT) AdcHalDmaCtxConfig(config *AdcHalDmaConfigT) {
+}
+
+/**
+ * Setting the digital controller.
+ *
+ * @param hal    Context of the HAL
+ * @param cfg    Pointer to digital controller parameter.
+ */
+// llgo:link (*AdcHalDmaCtxT).AdcHalDigiControllerConfig C.adc_hal_digi_controller_config
+func (recv_ *AdcHalDmaCtxT) AdcHalDigiControllerConfig(cfg *AdcHalDigiCtrlrCfgT) {
+}
+
+/**
+ * @brief Link DMA descriptor
+ *
+ * @param hal Context of the HAL
+ * @param data_buf Pointer to the data buffer, the length should be multiple of ``desc_max_num`` and ``eof_num`` in ``adc_hal_dma_ctx_t``
+ */
+// llgo:link (*AdcHalDmaCtxT).AdcHalDigiDmaLink C.adc_hal_digi_dma_link
+func (recv_ *AdcHalDmaCtxT) AdcHalDigiDmaLink(data_buf *c.Uint8T) {
+}
+
+/**
+ * @brief Get the ADC reading result
+ *
+ * @param      hal           Context of the HAL
+ * @param      eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
+ * @param[out] buffer        ADC reading result buffer
+ * @param[out] len           ADC reading result len
+ *
+ * @return                   See ``adc_hal_dma_desc_status_t``
+ */
+// llgo:link (*AdcHalDmaCtxT).AdcHalGetReadingResult C.adc_hal_get_reading_result
+func (recv_ *AdcHalDmaCtxT) AdcHalGetReadingResult(eof_desc_addr c.IntptrT, buffer **c.Uint8T, len *c.Uint32T) AdcHalDmaDescStatusT {
+	return 0
+}
+
+/**
+ * @brief Enable or disable ADC digital controller
+ *
+ * @param enable true to enable, false to disable
+ */
+//go:linkname AdcHalDigiEnable C.adc_hal_digi_enable
+func AdcHalDigiEnable(enable bool)
+
+/**
+ * @brief Enable pr disable output data to DMA from adc digital controller.
+ *
+ * @param enable true to enable, false to disable
+ */
+//go:linkname AdcHalDigiConnect C.adc_hal_digi_connect
+func AdcHalDigiConnect(enable bool)
+
+/**
+ * @brief Reset adc digital controller.
+ */
+//go:linkname AdcHalDigiReset C.adc_hal_digi_reset
+func AdcHalDigiReset()
+
+/**
+ * @brief Set ADC monitor with high and low thresholds, and will enable the interrupts accordingly
+ *
+ * @param monitor_id Monitor to configure
+ * @param adc_n Which ADC unit will be monitored
+ * @param adc_ch Which ADC channel will be monitored
+ * @param h_thres High threshold (disable if < 0)
+ * @param l_thres Low threshold (disable if < 0)
+ */
+// llgo:link AdcMonitorIdT.AdcHalDigiMonitorSetThres C.adc_hal_digi_monitor_set_thres
+func (recv_ AdcMonitorIdT) AdcHalDigiMonitorSetThres(adc_n AdcUnitT, adc_ch c.Uint8T, h_thres c.Int32T, l_thres c.Int32T) {
+}