Skip to content
This repository was archived by the owner on Oct 31, 2023. It is now read-only.

Update README.md #8

Open
ansh-srivastava wants to merge 1 commit into
base: main
Choose a base branch
from
Open

Update README.md #8

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion README.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
This repository contains the SystemVerilog RTL, C++, HLS (Intel FPGA OpenCL to wrap RTL code) and Python needed to reproduce the numerical results in "[Rethinking floating point for deep learning](https://arxiv.org/abs/1811.01721)" [1].

There are two types of floating point implemented:
There are two types of floating point implemented on following :

- N-bit (N, l, alpha, beta, gamma) log with ELMA [1]
- N-bit (N, s) (linear) posit [2]
Expand Down