Light cleanup prior to diving into full Arm-v6m compliance

[rbsexton]

These are cosmetic and functional changes.

Cosmetic

• Add an emum so that its clear which registers get pushed during stacking.
• Switch to stdint.h declarations to eliminate questions about sizes.
• Adjust the math on Disassembly output for branches so that addresses match those displayed in other compilation tools.

Functional

• Make the address of SRAM selectable at compile time. The manifest constant address (0x4000_0000), is reserved for peripherals on Cortex-M devices, so thats not a good choice. The standard memory map defined for Arm-6m puts SRAM at 0x2000_0000.
• Add support for the NOP instruction. Thats used for memory alignment by some compilers.
• Initial support for SVC/SWI - host-side code is next.