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EMX guide. This work was originally done in support of the Spring 2025 SkyWater130nm tapeout project with NCSU. Based upon work by Bharadwaj Padmanabhan. Then supplemented by Sushil Panda. Lastly augmented, cleaned and reformatted by Derek Hockenberry. You need access to the NCSU Tapeout-Simple and SkyWater130 repos to follow through this guide.

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EMX

A tutorial on EMX tool to design and characterize an inductor


This tutorial covers the basic setup of EMX for the simulation of single-ended inductors (with and without ground shields). This can be extended to other RF passives such as couplers, baluns, transformers, etc.

Section 1 of this tutorial will cover the EMX setup and inductor simulation. This section will also cover the steps required to pass LVS.

Section 2 will cover the basics of setting up a config file for use in the simulation of the full circuit that includes the Parasitic Extraction (PEX) of the transistors and metal wire interconnects and the EMX S-parameter file (for the RF passives).

Section 3 will have additional notes for EMX simulation of other RF passives.

Section 4 will demonstrate how to generate a lumped element model from the layout design.

Section 5 details incorporating a new LVS rule file. This may be necessary if the current rule deck is out of date.


Setting up the tool

You need to be logged into the Hydra or Grendel server. Please note, the following steps are performed on Hydra, so if you find something being broken, I recommend switching to Hydra and trying the steps again. In your home directory (or your current working directory), create a new directory (say EMX). And follow the steps to clone the full custom design Homework-1. Below are the steps:

mkdir EMX
cd EMX
git clone --recurse-submodules https://github.ncsu.edu/Tapeout/Tapeout-Simple.git
cd Tapeout-Simple
git submodule foreach --recursive 'git checkout $(git config -f $toplevel/.gitmodules submodule.$name.branch || echo main) && git pull';

Note, if you don't want to reclone the submodules directory then remove --recurse-submodules.

In the 'setup.sh' file, add the statement:

source .cdsinit

Not doing so will result in a missing 'EMX' tab in the virtuoso window.

The next step is to setup the tools and all env variables:

source setup.sh

The .cdsinit file requires a version of the available emx module to be already loaded (by 'setup.sh') and then will load the emx interface using the command:

load "./emxconfig.il"

Note, should the EMX tools not load automatically for some reason, the emx module may be manually loaded from the server terminal ('module load emx') and the emx interface may be manually loaded from the CIW ('load "./emxconfig.il"').

After some waiting, you will see the virtuoso CIW window.


Section 1

  1. Create a library and attach it to the technology library, which in our case is sky130_fd_pr_main. Let's name the library as EME_test.
  2. Create a new Cell view in the library of your choice. You can call it “01_inductor”. Set the type as “layout.”

  1. From the menu bar, Select EMX -> Simulate

  2. The EMX form should open. Ensure that the Process name is “sky130_v001a.proc” You can view the Metal Stackup by clicking on the “Scaled” button. The advanced options can be set by clicking on the “Advanced Options" button.

Inductor simulation:

We will use the “spiralInd” PCell from the “sky130_passiveLib” library as an example. You may design your own custom inductors or use one of the PCells.

  1. In the layout view, place an instance of “spiralInd” with the parameters as shown in the figure below:

Note: You may set the additional parameters, but they are not required.

  1. Your layout should look like this:

  1. You will need to specify the input and output of the inductor using pins.

a. First, select the met5 pin layer from the layers section.

b. Now click on Create → Pin from the menu bar:

c. Select the “Create Label” checkbox and click on the “Options” button.

d. Set the font height and choose the font you prefer. You can also set the label justification and rotation as per your requirement. Ensure that the “Layer Name” is set to “Same as Pin” and “Layer Purpose” is set to “Label” (as shown in the figure below) and click the “OK” button.

e. Enter the pin names in the “Terminal Names” box. You can also set the pin access direction based on the direction of signal flow (into the inductor and out of the inductor).

f. Now, draw each pin on the inductor. You will need to attach the label after drawing each pin (the label automatically pops up after drawing the pin. You will need to place this label on top of the pin that you just drew). Your layout should now look like this:

  1. After placing the pins, you will notice a flashing X on one of the pins (it could be either of them). This is because Layout XL (and consequently LVS) treats this as a short circuit. To mitigate this, select the met5 res layer from the layers section and draw a small rectangle adjacent to one of the pins as shown above (highlighted in RED):

    Note: The width and length of this met5 res box MUST be at least 1.6 μm

  2. Now run DRC and make sure that there are no DRC errors. You MUST fix any DRC errors in the design.

  3. To pass LVS, we will need to create a schematic view in the same cell (Cell “01_Inductor” and Type “Schematic”). Place an instance of “res_generic_m5” with the same dimensions as the met5 res box that you created in the layout. Note: click on the met5 res box and press the Q key to open the parameters (incl. dimensions).

Note: If your inductor is in a different metal layer, you should use the corresponding res_generic_mX, where X is the metal layer number.

  1. Attach inputOutput pins (with exact same names as in the layout). Your schematic should look like this:

  1. Check and save the schematic. Now, run LVS. You should have no errors. If you do, then make sure that these are just property errors where the LVS tool is unable to read the length and width parameters of the met5 res. This is due to a bug in the LVS rule deck and you should use the updated LVS rule deck. The steps to use a local LVS rule deck are explained in this section.

  2. The property of the inductor is the exact length and width of the met5 res layer in the layout.

  3. Return to the layout view. From the menu bar, click on EMX → Simulate.

  4. Change the Edge Mesh, Thickness and Via Merge to 0.5 as shown in the figure:

  1. Click on the Signals text box (the cursor must be in the text box) and click on the Assistant button (you can also press the enter/return key on the keyboard instead of the Assistant button).

  2. In the Select Signals window, select the “Pins” radio button and set the Depth to 0.

  3. Click on the None button to remove P1 and P2. Select the required signals and click on the Add button. Then click on OK. The before and after snapshots of the pin update are shown below:

  1. In the main EMX form, set the Start freq to 0 and the Stop to 1e+11 (which is 100 GHz). The large stop frequency will allow us to find the Self-resonance Frequency (SRF) of the inductor. You can leave the step size as is.

  2. In the Visualize section, check the “mesh” option. Uncheck the other Visualization options for now.

  3. In the Form State section of the EMX form, click on the “Save CV” option. This saves the EMX form with your changes to your cell. You can reload the form in the future if you wish to redo the simulations on a later date by clicking on the “Load CV” option.

  4. Your EMX form should look like this:

  1. You can view the EMX GDSview of the Inductor (to ensure that the pins are detected by EMX) by clicking on the EMX button in the layout view section of the form. Note that the met5 res does not appear in the GDS view as it belongs to the same layer as the routing metal.

  1. To simulate the inductor, click on the Start button in the Simulation section of the form. Note: DO NOT CLOSE THE EMX FORM.

  2. A window will pop up showing the progress of the simulation. Once the simulation is complete, the last line of the window should have the message “Process exited normally”

  1. Return to the EMX form and click on the Spar button in the Create view section. Two warning messages will pop up (one after the other). Click on the close button when the message windows pop up. This will create a view called schematic_nport in your cell.

  1. Now click on the Symbol button in Create view section. Close the warning message boxes that pop up.

  1. If you would like to view the mesh, click on the Mesh button in the ParaView section. ParaView will take some time (a few minutes) to launch for the first time. You may see some errors and warnings in your terminal window, but they can be ignored.

  2. To plot the inductance and Q-factor of the inductor that you simulated, return to the EMX form and click on the New (you can also click on Append) button in the Plotting section. You should get the following plot:

  1. You can re-iterate the inductor design if you are not satisfied with the results.

  2. Close the EMX form and open the Library Manager window. In addition to the schematic_nport and symbol views, you will see auCdl and auLvs views in your cell. Delete the auCdl and auLvs views as they will interfere with the simulation and LVS.

  1. Now open the schematic_nport view. You will notice an additional GND pin. This is a reference pin and can be replaced with the global ground “gnd!” label. Delete the GND pin (to maintain consistency across views) as shown below:

  1. Now open the symbol view and delete the GND pin.

  1. You can now use the schematic_nport view in your simulations. Be sure to add the schematic_nport view to the Switch View List (before the schematic view) in the Environment Options which can be found in Launch-> ADE explorer -> Setup → Environment in ADE Explorer. If you’re using ADE Assembler, open the dropdown under test, right click on the schematic name and click on Environment.

  1. Alternatively, you can create a config view in your testbench, which makes it easier and more convenient to setup the views to use in the simulations. You can find more information for setting up a config view for simulations in Section-2 of this tutorial.

Section 2: Setting up a config view for simulations

A config view for a testbench allows you to easily change the view to be used in simulation for each cell. To setup a config view,

  1. Setup your testbench schematic. Create a new schematic with the symbol of inductor istantiated. Creating a complete testbanch is left to the user as an exercise.

  1. Create a config view in the same cell.

  2. The New Configuration window should open. In the “Top Cell” section, set the View type to “schematic”. This sets the top cell view of the testbench cell.

  3. Now, click on the “Use Template” button. Then select “spectre” from the Name dropdown. Click on OK.

  1. Click OK on the Configuration window.

  2. The Virtuoso Hierarchy Editor should now open. To change the View to Use, right-click on the default “View Found” for your cell and change view to schematic_nport.

  3. Now click on the Save button. This automatically recomputes the hierarchy. Repeat this for all the cell views that need to be changed.

  1. To use the config file in your simulation, click on the ADE Explorer button in the config window. This will automatically setup the test to use the config view if you are creating a new maestro view.

  2. If you have an existing maestro view setup, then launch ADE Explorer/ADE Assembler, right-click on the test and select Design. Then change the View Name from "schematic" to "config".

  1. Note: For EM passives, make sure you use the “schematic_nport” view. Otherwise, the simulation results will be incorrect.

Section 3: EMX settings for other RF passives

  1. For simulating transformers, interconnects, tcoils and other sub-options, specify the correct pins.

  2. You can also use the N-port setting in the Type section of the EMX form. This is particularly useful when you have custom inductors with multiple ground pins, baluns, Couplers, etc. This setting can be used for any RF Passive. Note: The standard symbol for any N-port device would be a square with pins on both sides. You can manually customize these symbols. Also, you cannot plot any waveform from the EMX form directly when using the N-port setting. You will have to create a testbench with ports and run an S-parameter simulation. For integration into other analyses --- such as transient --- please refer to the instructions in Section-4.

  3. The procedure to run the simulation is the same regardless of the type of passive.

  4. If you wish to visualize the current and charge, check the respective boxes in the Visualize section and click on the corresponding button after simulation. Note: You can only run the current and charge visualization at a single frequency (the Start freq and Stop freq are the same).


[Inductor with a Ground Shield (Pictures to be added soon)]: # Comment structure

The setup procedure is similar to that of the regular inductor, with a few additional steps.

Note: No reference plots have been included for this section. It has been left as an exercise for the reader.

  1. Firstly, create a Ground Shield (it can be in any metal layer below the inductor layer), and place a pin on the ground shield (Note: If you plan on using multiple ground pins to better model the ground, refer to Section 3: EMX setting for other RF Passives). In this example, it is gnd_r.

Note: Ensure that the ground shield must fully cover the inductor

  1. Create a schematic view.

If you’re using two ground pins, then you should use a res_generic_m1 instance between the two ground pins as shown below (follow Section 3 procedure).

Note: The minimum width for each metal resistor layer is different (it is equal to the minimum width of the corresponding metal). For met1 res (res_generic_m1), the minimum dimensions are 140nm.

  1. Setup the form as shown in the figure. Be sure to add the ground pin(s) to the signals section and NOT the Grounds section.

  2. Change the Type in the EMX Form to Single-ended shield inductor by clicking on the Type text box (the cursor must be in the text box) and click on the Assistant button (you can also press the enter/return key on the keyboard instead of the Assistant button).

  3. You can now follow the same procedure for running the EMX simulation and creating the schematic_nport & symbol views as mentioned in the Inductor Simulation subsection. Delete the “GND” ground reference pin and replace it with the global ground label “gnd!”.


Additional Notes

  1. Make sure your design passes both DRC and LVS. If you get any LVS errors (such as missing parameters for the res_generic_mX), you will need an updated LVS rule file. If the one in this repository does not work for you, please contact your instructor to obtain the updated LVS rule file. See Section-5 for more information regarding incorporating the included LVS rule deck into the LVS check.
  2. The resistance mentioned in the res_generic_mX DOES NOT MATTER. It is only there to trick LVS and the layout tools into thinking that there is a break between the two pins. If you look at their GDS layers, it is exactly the same as the metal layer itself. This "resistance" is the calculated sheet resistance of the metal itself. This does not increase or decrease the metal resistance in any way.

Section 4: Lumped element model generation

For use with some analyses outside of an S Parameter analysis, a lumped element representation may be useful. The following steps demonstrate how a lumped element model schematic can be generated automatically from the EMX form.

  1. First ensure a frequency sweep is defined in the EMX form. This is necessary for model generation.

  2. In the open EMX form, click “Start” next to where it says “Create model”. A new window will appear showing the status of the model generation.

  1. In the “Create model” section of the form, click the button labeled “Model”. This will populate a schematic file with the lumped elements determined by the previous step.

If a schematic view already exists in the cell view, a window will appear asking for permission to overwrite the existing file. If the existing needs to be saved, simply rename the existing file from the Library Manager screen and proceed to generate the new schematic. The following figure shows an example of how an existing schematic was renamed to “schematic_le” to avoid being overwritten.

  1. Similarly to the process for creating the schematic_nport, a GND pin may be generated unnecessarily. If there is no ground pin in the passive device design, remove the GND pin instance and replace its connections with ones connected to the global ground (label the node with “!gnd”). These changes are highlighted in the following figures. Also note: the pins labeled “ant+” and “ant-” are the equivalent of “P1” and “P2” from the EMX form. They were simply renamed. Use the names of the actual pins in your specific design.

  1. To ensure the new lumped element schematic view is being used in a testbench, be sure to change the “View To Use” selection in the config file of the testbench, as shown below.


Section 5: Running LVS with the updated/new/local LVS rule deck

The use of this updated rule file is important as it takes care of the property errors for the inductor.

  1. To run LVS using the new/local LVS rule deck, place the new rule deck 'sky130_mod.lvs.pvl' in your working directory.

  2. In the Pegasus_LVS window, click on 'add' and go to the path where you have placed the updated LVS rule file.

  3. Now you have set up the new LVS rule file, and you can follow the usual process to run LVS.

About

EMX guide. This work was originally done in support of the Spring 2025 SkyWater130nm tapeout project with NCSU. Based upon work by Bharadwaj Padmanabhan. Then supplemented by Sushil Panda. Lastly augmented, cleaned and reformatted by Derek Hockenberry. You need access to the NCSU Tapeout-Simple and SkyWater130 repos to follow through this guide.

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