The program is based on the RISC-V architecture and uses open-source tools to teach people about VLSI chip design and RISC-V. The instructor for this internship is Kunal Ghosh Sir.
- Name: Shobhit Singh
- College: CV Raman Global University
- Email ID: singhshobhit2020@gmail.com
- GitHub Profile: shobhitsingh18
▶️ Task 1: Tool Installation
Install all essential tools required for this internship:
- Ubuntu on VMBox
- RISC-V GNU Toolchain
- GTKWave waveform viewer
- Yosys Open SYnthesis Suite
- Icarus Verilog simulator
▶️ Task 2: Instruction Type Identification
Identify the instruction type of all given instructions with the exact 32-bit instruction code in the desired instruction type format.
▶️ Task 3: C and RISC-V Code Compilation
Refer to C-based and RISC-V-based lab videos and execute the task of compiling C code using both the standard GCC and the RISC-V compiler.
▶️ Task 4: SPIKE Simulation and Debugging
Perform SPIKE simulation and debug C code with the interactive debugging mode using Spike.
▶️ Task 5: Functional Simulation with Waveforms
Using the RISC-V Core Verilog Netlist and Testbench, perform a functional simulation and observe the resulting waveforms.
▶️ Task 6: Digital Circuit Implementation
Implement digital circuits using the VSDSquadron Mini board and verify the building/uploading of C program files onto the RISC-V processor.