FPGA Spectrum Visualizer

A real-time audio spectrum analyzer implemented on FPGA using Verilog/VHDL, featuring FFT processing and LED/display output visualization.

Project Overview

This project implements a hardware-accelerated spectrum visualizer on an FPGA platform. Audio signals are processed in real-time using Fast Fourier Transform (FFT) to analyze frequency components and display them as a visual spectrum.

Demonstration

Project Structure

FPGA-Spectrum-Visualizer/
├── README.md                    # This file
├── 3D Design/                   # Hardware enclosure and mechanical designs
│   └── README.md
├── sender/                      # Audio data transmission utilities
│   ├── README.md
│   ├── requirements.txt
│   └── UART_sender.py
└── spectrum_visualizer/         # Main FPGA project (Xilinx Vivado)
    ├── README.md
    ├── spectrum_visualizer.xpr  # Vivado project file
    ├── spectrum_visualizer.hw/  # Hardware configuration
    ├── spectrum_visualizer.runs/ # Synthesis and implementation runs
    └── spectrum_visualizer.srcs/ # Source files (HDL, constraints)

Directory Descriptions

📁 3D Design

Contains CAD files and designs for the physical enclosure and mounting hardware for the FPGA board and display components.

📁 sender

Python-based utilities for sending audio data to the FPGA via UART interface. Includes scripts for real-time audio capture and transmission.

📁 spectrum_visualizer

Main Vivado project containing all HDL source files, IP cores (FFT), constraints, and synthesis/implementation results.

Getting Started

Prerequisites

• Hardware: Xilinx FPGA development board (Artix-7, Zynq, or similar)
• Software:
  • Xilinx Vivado Design Suite (2019.1 or later)
  • Python 3.7+ (for sender utilities)
  • pySerial library

Quick Start

1. Clone the repository

   git clone https://github.com/chathura-de-silva/FPGA-Spectrum-Visualizer.git
   cd FPGA-Spectrum-Visualizer

2. Open the Vivado project

   • Launch Xilinx Vivado
   • Open project: spectrum_visualizer/spectrum_visualizer.xpr

3. Setup audio sender

   cd sender
   pip install -r requirements.txt
   python UART_sender.py

4. Synthesize and implement

   • In Vivado, run synthesis and implementation
   • Generate bitstream
   • Program the FPGA

Features

• ✅ Real-time FFT audio processing
• ✅ UART communication interface
• ✅ Configurable frequency bins
• ✅ LED/Display output support
• ✅ Low latency processing

Hardware Requirements

• FPGA development board with sufficient logic resources
• UART interface for audio data input
• LED array or display module for visualization
• Power supply (typically USB or 12V adapter)

Contributing

Contributions are welcome! Please feel free to submit pull requests or open issues for bugs and feature requests.

License

This project is part of an academic curriculum. Please check with the repository owner for licensing details.

Authors

• Chathura De Silva (@chathura-de-silva)
• Akindu Induwara (@AkinduID)
• Tharusha Dinujaya (@tharushaDinujaya)
• Rashmika Dushan (@RashmikaDushan)

Acknowledgments

• Xilinx for the FFT IP Core