This repository implements a Level Set Method (LSM) framework to simulate material interface evolution during semiconductor etching. The LSM naturally handles sharp corners, topological changes (merging and splitting), and large speed variations by solving Hamilton-Jacobi equations on structured grids. Key features include multiple high-order time integration and spatial reconstruction schemes, surface extraction, material-dependent etching, and parallel computation via OpenMP combined with sparse matrix operations. The implementation achieves super linear speedup. Validation using comprehensive quantitative metrics—including Hausdorff distance, area difference, perimeter ratio, shape context, and Hu moments—confirms high accuracy and strong robustness in capturing topological changes. Benchmarks demonstrate 97.74% similarity with the industrial standard SEMulator3D.
Semiconductor etching is a critical manufacturing process for creating intricate microstructures through selective material removal. Accurate simulation of this process is essential to reduce development costs. The process involves tracking evolving interfaces with complex geometries, multi-material interactions, and challenging boundary conditions. Traditional methods face limitations: marker/string techniques suffer from swallowtail instabilities during topological changes; cell-based approaches compromise geometric accuracy; and characteristic methods exhibit 3D stability issues. The Level Set Method (LSM), pioneered by Osher and Sethian, overcomes these challenges by implicitly representing interfaces as zero-level sets of higher-dimensional functions. This approach naturally handles topological changes, sharp corners, and extreme velocity variations while providing entropy-satisfying weak solutions to Hamilton-Jacobi equations. Although extensions like fast marching and narrow-band techniques exist, prior semiconductor implementations have been limited to first-order schemes and lack efficient parallelization.
This work introduces a parallel 3D LSM framework for etching simulation featuring:
- High-order spatial and temporal discretization for improved accuracy
- Multi-threaded parallelization using OpenMP for enhanced computational efficiency
- Robust handling of orientation-dependent etching and multi-material interactions
- Validation against industrial standards, with quantitative metrics (Hausdorff distance, shape context, Hu moments) verifying accurate topology management
The level set method represents the evolving etching front
Where:
-
$\phi <= 0$ : inside material -
$\phi > 0$ : outside geometry
This implicit representation naturally handles topological changes (splitting/merging) and complex geometries.
The evolution of
Alternatively, it can be expressed in Hamilton-Jacobi form:
where:
-
$\mathbf{U}$ is the velocity field -
$F = \mathbf{U} \cdot \mathbf{n}$ is the normal velocity component -
$\mathbf{n} = \nabla \phi / |\nabla \phi|$ is the unit normal vector
For semiconductor applications, the velocity field
where:
-
$R_m$ is the vertical etching rate for material$m$ -
$\alpha_r$ controls the lateral-to-vertical etching ratio
The initial signed distance field is:
where
Etching simulations involve evolving the interface of materials over time, which can be described by the zero level set of a signed distance function
where
Due to the complex geometries in semiconductor structures, first-order methods fail to provide sufficient accuracy. Hence, higher-order methods—such as finite volume schemes with Riemann solvers and high-order Runge-Kutta integration—are employed to obtain precise and robust numerical solutions.
To maintain conservation and handle discontinuities accurately, the semi-discrete form of the conservation law is used:
where the flux function is defined as:
The hyperbolic convective term
A monotonic but diffusive scheme:
where
Combines the Roe solver with piecewise linear MUSCL reconstruction:
Limiter function:
This configuration enhances accuracy while preserving monotonicity.
Utilizes third-order accuracy in smooth regions via quadratic interpolation:
Limiter for oscillation control:
This limiter ensures Total Variation Diminishing (TVD) behavior, preserving solution stability near discontinuities.
All schemes are extended to three dimensions using operator splitting, applied dimension-by-dimension. Grid spacings
-
Dirichlet:
$\phi = \phi_{\text{specified}}$ -
Neumann:
$\frac{\partial \phi}{\partial n} = 0$
Three schemes are implemented for temporal discretization, balancing accuracy and stability:
1st-order, unconditionally stable:
Discretization yields the linear system:
where
2nd-order, unconditionally stable:
This yields the linear system:
3rd-order, explicit:
where
The method preserves TVD properties when combined with spatial limiters and requires the CFL condition:
| Method | Order | Stability | Computational Cost |
|---|---|---|---|
| Backward Euler | 1st | Unconditional | High (linear solve) |
| Crank-Nicolson | 2nd | Unconditional | High (linear solve) |
| TVD RK3 | 3rd | CFL-limited | Low (explicit) |
To maintain the signed distance property (
where:
Smoothed sign function:
Additional parameters:
-
$|\nabla\psi|$ is computed with central differences - Forward Euler time stepping:
$\Delta\tau = 0.1 \min \Delta x$ - Terminate when:
$| |\nabla\psi| - 1 | < 0.01$
Reinitialization is executed every 5–10 physical time steps and parallelized using OpenMP.
To manage the computational demands of 3D semiconductor etching simulations, we adopt a high-performance computing technique that combines sparse linear algebra optimization with advanced solver configuration. Efficient solution of large sparse systems arising from implicit temporal discretization is achieved through parallel matrix assembly techniques and parallelism of the BiCGSTAB solver. This includes the use of Triplet storage with thread-local buffers, pre-computation of sparsity patterns to eliminate dynamic allocation during assembly, and Lock-free insertion strategies using OpenMP parallel.
To enhance memory efficiency and performance, matrices are stored as compressed row storage (CRS) format employing blocked CRS layouts for improved cache locality, and utilize SIMD-optimized packing to increase arithmetic throughput. For solving the discretized Hamilton-Jacobi equations, we configure an accelerated BiCGSTAB solver based on Eigen's vectorized implementation. The solver is further enhanced with diagonal pre-conditioning, together with a strict convergence tolerance of
The simulation is performed using a
| #Threads | Backward Euler (s) | Speedup | Runge-Kutta 3 (s) | Speedup |
|---|---|---|---|---|
| 1 | 5126 | - | 12340 | - |
| 2 | 3670 | 1.39× | 6406 | 1.92× |
| 4 | 3764 | 1.36× | 3414 | 3.61× |
| 8 | 2683 | 1.91× | 1834 | 6.73× |
| 16 | 2684 | 1.90× | 1098 | 11.22× |
From the table above, third-order Runge-Kutta scales significantly better with increasing threads, achieving 11.22× speedup when the number of threads increases to 16. In contrast, the Backward Euler method demonstrates scaling limitations, with minimal gain beyond 8 threads.
SEMulator3D's runtime for simulating this case is 940 seconds with 8 threads on a computer equipped with an AMD Ryzen 9 5900HX CPU @ 3.30 GHz. Although SEMulator3D uses 4,614,538 triangles in spatial discretization and applies undisclosed etching simulation techniques, the proposed algorithm already exhibits comparable efficiency to SEMulator3D.
| Method | Score |
Score |
|---|---|---|
| Backward Euler | 0.9880 | 0.9837 |
| Runge-Kutta 3 | 0.9774 | 0.9770 |
This work presents a high-fidelity, parallel level-set framework for simulating semiconductor etching processes with complex topographies. By integrating high-order spatial reconstruction (MUSCL, QUICK) and time integration schemes (Backward Euler, Crank-Nicolson, TVD RK3), the implementation achieves both numerical stability and geometric accuracy. The method effectively captures sharp corners, topological transitions, and anisotropic etching behaviors, overcoming key limitations of traditional front-tracking approaches.
The adoption of OpenMP-parallelized sparse matrix solvers and stencil operations enables efficient large-scale 3D simulations. Benchmark results show that the third-order Runge-Kutta scheme not only improves accuracy but also demonstrates superior parallel scalability—achieving up to 11.22× speedup with 16 threads. Validation against SEMulator3D confirms that the proposed method maintains a high degree of geometric similarity (up to 98.80%) with industrial standards.
Altogether, the proposed framework offers a robust, extensible, and computationally efficient platform for simulating etching topographies.