wolvrix converts high-level behavioral RTL (Verilog-2005/SystemVerilog subset) into a structured GRH (Graph RTL Hierarchy) representation, which can then be emitted back as structural Verilog designs. It supports configurable logic transformations and plugin extensions for simulation, synthesis, formal verification, and custom analysis workflows.
wolvrix is a SystemVerilog parser built on slang, designed for analyzing and processing SystemVerilog RTL designs.
# Initialize submodules
git submodule update --init --recursive
# Build with CMake (from repo root)
cmake -S wolvrix -B wolvrix/build
cmake --build wolvrix/build -j$(nproc)The resulting binary will be available at wolvrix/build/bin/wolvrix.
# Install editable package (from repo root)
python3 -m pip install -e wolvrix
# Basic template (bindings + run_pipeline)
python3 - <<'PY'
import wolvrix
design = wolvrix.read_sv("path/to/file.sv", slang_args=["--top", "top"], log_level="warn")
pipeline = [
"xmr-resolve",
"const-fold",
"redundant-elim",
"memory-init-check",
"dead-code-elim",
"stats",
]
wolvrix.run_pipeline(design, pipeline)
design.write_json("out.json")
design.write_sv("out.sv")
PYctest --test-dir wolvrix/build --output-on-failureThis project uses the MIT License, same as slang. See LICENSE.