Welcome to the Verilog Practice Problems repository! This repository contains a series of practice problems designed to help you improve your Verilog skills. If you are a beginner just getting started with hardware description languages or an experienced developer looking to refine your skills, this collection of problems will be a valuable resource.
Half Adder
Full Adder
Half Subtractor
Full Subtractor
Full Adder using Half Adder
Full Subtractor Using Half Subtractor
Ripple Carry Adder
ALU
Carry Look Ahead Adder
Binary to Gray
Gray to Binary
2x1 Mux
4x1 Mux
4x1 Mux using 2x1 Mux
1x2 Demux
1x4 Demux using 1x2 Demux
3x8 Decoder
8x3 Encoder
Priority Encoder
Comparaotr
Odd Parity Checker
D Flip-Flop with Asynchronous Reset
D Flip-Flop with Synchronous Reset
SR Flip-Flop
JK Flip-Flop
T Flip-Flop
Universal Shift Register
Asynchronous Counter
Synchronous Conter
Moore 1010 Sequence Detector
Mealy 1010 Sequence Detector