Created the modules for the following:
Latch (simply passes the data through on the clock cycle) Instruction memory Holds 2^32 words For now populate the first 10 addresses with Dummy Data Returns the instruction at a a given address PC (simply passes the input as the output on the clock cycle) Mux Adder or incrementer Final IF stage (module with all 5 components)
Initialize the first 10 words of memory (with addresses 0, 4, 8, etc.) with the following HEX values:
A00000AA 10000011 20000022 30000033 40000044 50000055 60000066 70000077 80000088 90000099