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1. reg2reg_synthesis reg2reg_synthesis Public

   Synthesis of reg2reg single module with basic gates using Synopsys Design Compiler

2. tools-installation tools-installation Public

3. Tile_RTL_to_GDSII_28nm_Synopsys Tile_RTL_to_GDSII_28nm_Synopsys Public

   End-to-end RTL to GDSII ASIC physical design implementation at 28nm using Synopsys DC and ICC2 with full timing closure and DRC clean signoff.