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Tk/fault enable reset #65

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826f7db
minimum on time
tonokip Nov 28, 2020
267a77e
microstepper: minimum on time should gate the high side mosfets too
tonokip Nov 28, 2020
0574b5b
spi microstepper config
tonokip Nov 28, 2020
f2aea56
invert bridge outputs
tonokip Nov 28, 2020
32bcde0
make cosine table configurable
tonokip Nov 28, 2020
fa05879
fix enable pin
tonokip Nov 28, 2020
0901261
make fault latching. implement enable. also gate the outputs with reset.
tonokip Nov 28, 2020
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2 changes: 2 additions & 0 deletions src/constants.v
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Original file line number Diff line number Diff line change
Expand Up @@ -8,4 +8,6 @@
`define CMD_MOTOR_ENABLE 8'h0a
`define CMD_MOTORCONFIG 8'h10
`define CMD_CLK_DIVISOR 8'h20
`define CMD_MICROSTEPPER_CONFIG 8'h30
`define CMD_COSINE_CONFIG 8'h40
`define CMD_API_VERSION 8'hfe
4 changes: 2 additions & 2 deletions src/microstepper/analog_out.v
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Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@ module analog_out (
input wire [7:0] pwm1,
input wire [7:0] pwm2,
output wire analog_out1,
output wire analog_out2
output wire analog_out2,
input wire [10:0] current_threshold
);
parameter current_threshold = 1024;

reg [10:0] pwm_counter;

Expand Down
80 changes: 77 additions & 3 deletions src/microstepper/cosine.v
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Original file line number Diff line number Diff line change
@@ -1,12 +1,85 @@
module cosine (
input wire [5:0] cos_index,
output wire [7:0] cos_value
output wire [7:0] cos_value,
input wire [511:0] cos_table
);

reg [31:0] cos_table[0:255];
//reg [31:0] cos_table[0:255];

assign cos_value = cos_table[cos_index];
//assign cos_value = cos_table[cos_index*8+7:cos_index*8];

reg [7:0] cos_r;
assign cos_value = cos_r;

always @(*)
case (cos_index)
1'd0 : cos_r <= cos_table [ 7 : 0 ];
1'd1 : cos_r <= cos_table [ 15 : 8 ];
2'd2 : cos_r <= cos_table [ 23 : 16 ];
2'd3 : cos_r <= cos_table [ 31 : 24 ];
3'd4 : cos_r <= cos_table [ 39 : 32 ];
3'd5 : cos_r <= cos_table [ 47 : 40 ];
3'd6 : cos_r <= cos_table [ 55 : 48 ];
3'd7 : cos_r <= cos_table [ 63 : 56 ];
4'd8 : cos_r <= cos_table [ 71 : 64 ];
4'd9 : cos_r <= cos_table [ 79 : 72 ];
4'd10 : cos_r <= cos_table [ 87 : 80 ];
4'd11 : cos_r <= cos_table [ 95 : 88 ];
4'd12 : cos_r <= cos_table [ 103 : 96 ];
4'd13 : cos_r <= cos_table [ 111 : 104 ];
4'd14 : cos_r <= cos_table [ 119 : 112 ];
4'd15 : cos_r <= cos_table [ 127 : 120 ];
5'd16 : cos_r <= cos_table [ 135 : 128 ];
5'd17 : cos_r <= cos_table [ 143 : 136 ];
5'd18 : cos_r <= cos_table [ 151 : 144 ];
5'd19 : cos_r <= cos_table [ 159 : 152 ];
5'd20 : cos_r <= cos_table [ 167 : 160 ];
5'd21 : cos_r <= cos_table [ 175 : 168 ];
5'd22 : cos_r <= cos_table [ 183 : 176 ];
5'd23 : cos_r <= cos_table [ 191 : 184 ];
5'd24 : cos_r <= cos_table [ 199 : 192 ];
5'd25 : cos_r <= cos_table [ 207 : 200 ];
5'd26 : cos_r <= cos_table [ 215 : 208 ];
5'd27 : cos_r <= cos_table [ 223 : 216 ];
5'd28 : cos_r <= cos_table [ 231 : 224 ];
5'd29 : cos_r <= cos_table [ 239 : 232 ];
5'd30 : cos_r <= cos_table [ 247 : 240 ];
5'd31 : cos_r <= cos_table [ 255 : 248 ];
6'd32 : cos_r <= cos_table [ 263 : 256 ];
6'd33 : cos_r <= cos_table [ 271 : 264 ];
6'd34 : cos_r <= cos_table [ 279 : 272 ];
6'd35 : cos_r <= cos_table [ 287 : 280 ];
6'd36 : cos_r <= cos_table [ 295 : 288 ];
6'd37 : cos_r <= cos_table [ 303 : 296 ];
6'd38 : cos_r <= cos_table [ 311 : 304 ];
6'd39 : cos_r <= cos_table [ 319 : 312 ];
6'd40 : cos_r <= cos_table [ 327 : 320 ];
6'd41 : cos_r <= cos_table [ 335 : 328 ];
6'd42 : cos_r <= cos_table [ 343 : 336 ];
6'd43 : cos_r <= cos_table [ 351 : 344 ];
6'd44 : cos_r <= cos_table [ 359 : 352 ];
6'd45 : cos_r <= cos_table [ 367 : 360 ];
6'd46 : cos_r <= cos_table [ 375 : 368 ];
6'd47 : cos_r <= cos_table [ 383 : 376 ];
6'd48 : cos_r <= cos_table [ 391 : 384 ];
6'd49 : cos_r <= cos_table [ 399 : 392 ];
6'd50 : cos_r <= cos_table [ 407 : 400 ];
6'd51 : cos_r <= cos_table [ 415 : 408 ];
6'd52 : cos_r <= cos_table [ 423 : 416 ];
6'd53 : cos_r <= cos_table [ 431 : 424 ];
6'd54 : cos_r <= cos_table [ 439 : 432 ];
6'd55 : cos_r <= cos_table [ 447 : 440 ];
6'd56 : cos_r <= cos_table [ 455 : 448 ];
6'd57 : cos_r <= cos_table [ 463 : 456 ];
6'd58 : cos_r <= cos_table [ 471 : 464 ];
6'd59 : cos_r <= cos_table [ 479 : 472 ];
6'd60 : cos_r <= cos_table [ 487 : 480 ];
6'd61 : cos_r <= cos_table [ 495 : 488 ];
6'd62 : cos_r <= cos_table [ 503 : 496 ];
default : cos_r <= cos_table [ 511 : 504 ];
endcase

/*
initial begin
cos_table[0] = 8'd255;
cos_table[1] = 8'd255;
Expand Down Expand Up @@ -73,4 +146,5 @@ module cosine (
cos_table[62] = 8'd13;
cos_table[63] = 8'd6;
end
*/
endmodule
83 changes: 65 additions & 18 deletions src/microstepper/microstepper_top.v
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,12 @@ module microstepper_top (
input analog_cmp2,
output analog_out2,
output chargepump_pin,
input [9:0] config_offtime,
input [7:0] config_blanktime,
input [9:0] config_fastdecay_threshold,
input [7:0] config_minimum_on_time,
input [10:0] config_current_threshold,
input [511:0] cos_table,
input step,
input dir,
input enable
Expand All @@ -38,31 +44,38 @@ end
reg [7:0] blank_timer1;
reg [9:0] off_timer0;
reg [9:0] off_timer1;
reg [7:0] minimum_on_timer0;
reg [7:0] minimum_on_timer1;

wire overCurrent0 = off_timer0 > 0;
wire overCurrent1 = off_timer1 > 0;

wire fastDecay0 = off_timer0 >= 706;
wire fastDecay1 = off_timer1 >= 706;
wire fastDecay0 = off_timer0 >= config_fastdecay_threshold;
wire fastDecay1 = off_timer1 >= config_fastdecay_threshold;

wire slowDecay0 = overCurrent0 && fastDecay0 == 0;
wire slowDecay1 = overCurrent1 && fastDecay1 == 0;


wire fault0 = (minimum_on_timer0 > 0) && overCurrent0;
wire fault1 = (minimum_on_timer1 > 0) && overCurrent1;
wire fault_active = fault0 | fault1;
reg fault;
reg resetn_buf;
reg enable_buf;

reg [1:0] s1r, s2r, s3r, s4r;
wire phase_a1_h, phase_a1_l, phase_a2_h, phase_a2_l;
wire phase_b1_h, phase_b1_l, phase_b2_h, phase_b2_l;

assign s_l[0] = phase_a1_l;
assign s_l[1] = phase_a2_l;
assign s_l[2] = phase_b1_l;
assign s_l[3] = phase_b2_l;
assign s_l[0] = !(phase_a1_l | fault | enable_buf) & resetn_buf;
assign s_l[1] = !(phase_a2_l | fault | enable_buf) & resetn_buf;
assign s_l[2] = !(phase_b1_l | fault | enable_buf) & resetn_buf;
assign s_l[3] = !(phase_b2_l | fault | enable_buf) & resetn_buf;

assign s_h[0] = phase_a1_h;
assign s_h[1] = phase_a2_h;
assign s_h[2] = phase_b1_h;
assign s_h[3] = phase_b2_h;
assign s_h[0] = !(phase_a1_h | fault | enable_buf) & resetn_buf;
assign s_h[1] = !(phase_a2_h | fault | enable_buf) & resetn_buf;
assign s_h[2] = !(phase_b1_h | fault | enable_buf) & resetn_buf;
assign s_h[3] = !(phase_b2_h | fault | enable_buf) & resetn_buf;

assign phase_a1_h = slowDecay0 | (fastDecay0 ? s1r[1] : ~s1r[1]);
assign phase_a1_l = fastDecay0 ? ~s1r[1] : (slowDecay0 ? 1'b0 : s1r[1]);
Expand All @@ -88,7 +101,18 @@ end
end
`endif

// Fault Conditions
always @(posedge clk) begin
if (!resetn)
fault <= 0;
else if( fault_active )
fault <= 1;
end

// Buffers
always @(posedge clk) begin
enable_buf <= enable;
resetn_buf <= resetn;
s1r <= {s1r[0], s1};
s2r <= {s2r[0], s2};
s3r <= {s3r[0], s3};
Expand All @@ -101,7 +125,7 @@ end
.clk (clk),
.resetn (resetn),
.start_enable(analog_cmp1 & blank_timer0 == 0 & overCurrent0 == 0),
.start_time (10'd810),
.start_time (config_offtime),
.timer (off_timer0)
);

Expand All @@ -111,7 +135,7 @@ end
.clk (clk),
.resetn (resetn),
.start_enable(analog_cmp2 & blank_timer1 == 0 & overCurrent1 == 0),
.start_time (10'd810),
.start_time (config_offtime),
.timer (off_timer1)
);

Expand All @@ -121,7 +145,7 @@ end
.clk (clk),
.resetn (resetn),
.start_enable(s1_starting | s2_starting),
.start_time (8'd27),
.start_time (config_blanktime),
.timer (blank_timer0)
);

Expand All @@ -131,10 +155,30 @@ end
.clk (clk),
.resetn (resetn),
.start_enable(s3_starting | s4_starting),
.start_time (8'd27),
.start_time (config_blanktime),
.timer (blank_timer1)
);

mytimer #(
.WIDTH(8)
) minimumontimer0 (
.clk (clk),
.resetn (resetn),
.start_enable(s1_starting | s2_starting),
.start_time (config_minimum_on_time),
.timer (minimum_on_timer0)
);

mytimer #(
.WIDTH(8)
) minimumontimer1 (
.clk (clk),
.resetn (resetn),
.start_enable(s3_starting | s4_starting),
.start_time (config_minimum_on_time),
.timer (minimum_on_timer1)
);

chargepump cp0 (
.clk (clk),
.resetn (resetn),
Expand All @@ -150,12 +194,14 @@ end

cosine cosine0 (
.cos_index(cos_index1),
.cos_value(pwm1)
.cos_value(pwm1),
.cos_table(cos_table)
);

cosine cosine1 (
.cos_index(cos_index2),
.cos_value(pwm2)
.cos_value(pwm2),
.cos_table(cos_table)
);

analog_out ao0 (
Expand All @@ -164,7 +210,8 @@ end
.pwm1 (pwm1),
.pwm2 (pwm2),
.analog_out1(analog_out1),
.analog_out2(analog_out2)
.analog_out2(analog_out2),
.current_threshold (config_current_threshold)
);

endmodule
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