Skip to content

feat(fpga_diff): support no-diff with fpga io #94

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
xiaokamikami wants to merge 1 commit into
base: main
Choose a base branch
from
Open

feat(fpga_diff): support no-diff with fpga io #94

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 2 additions & 1 deletion fpga_diff/src/rtl/common/XDMA_AXI4LiteBar.sv
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@ module XDMA_AXI4LiteBar(
input io_axi_read_rready,

// sideband
output io_host_diff_enable,
output io_host_reset
);

Expand Down Expand Up @@ -65,7 +66,7 @@ module XDMA_AXI4LiteBar(

// Sideband signals
assign io_host_reset = regfile_0[0];

assign io_host_diff_enable = regfile_1[0];
// Byte-lane masked write
function automatic [31:0] mask_write32(
input [31:0] oldv, input [31:0] newv, input [3:0] strb
Expand Down
8 changes: 5 additions & 3 deletions fpga_diff/src/rtl/common/core_def_xdma.sv
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1071,6 +1071,7 @@ assign i2c2_prdata = 0;
wire inter_rtc_clk;

wire io_host_reset;
wire io_host_diff_enable;
wire clock_enable;
wire sys_rstn_io;
wire cpu_rstn_io;
Expand All @@ -1088,7 +1089,7 @@ assign i2c2_prdata = 0;
wire xdma_link_up = pcie_lnk_sync[1];

assign difftest_to_host_axis_ready = difftest_to_host_axis_ready_io & xdma_link_up;
assign difftest_to_host_axis_valid_io = difftest_to_host_axis_valid & xdma_link_up;
assign difftest_to_host_axis_valid_io = difftest_to_host_axis_valid & xdma_link_up & io_host_diff_enable;

xdma_ep xdma_ep_i(
.cpu_clk(sys_clk_i),
Expand Down Expand Up @@ -1153,18 +1154,19 @@ assign i2c2_prdata = 0;
.io_axi_read_rvalid (XDMA_AXI_LITE_rvalid),
.io_axi_read_rready (XDMA_AXI_LITE_rready),

.io_host_diff_enable (io_host_diff_enable),
.io_host_reset (io_host_reset)
);

DifftestClockGate SOC_CLK_CTRL(
.CK (sys_clk_i),
.E ((difftest_clock_enable & xdma_link_up )|| ~sys_rstn_io || ~cpu_rstn_io),
.E ((difftest_clock_enable & xdma_link_up ) || ~io_host_diff_enable || ~sys_rstn_io || ~cpu_rstn_io),
.Q (inter_soc_clk)
);

DifftestClockGate RTC_CLK_CTRL(
.CK (tmclk),
.E ((difftest_clock_enable & xdma_link_up) || ~sys_rstn_io || ~cpu_rstn_io ),
.E ((difftest_clock_enable & xdma_link_up) || ~io_host_diff_enable || ~sys_rstn_io || ~cpu_rstn_io ),
.Q (inter_rtc_clk)
);

Expand Down