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2 changes: 2 additions & 0 deletions configs/common/Options.py
Original file line number Diff line number Diff line change
Expand Up @@ -147,6 +147,8 @@ def addNoISAOptions(parser, configure_xiangshan=False):
parser.add_argument("--l1-to-l2-pf-hint", action="store_true")
parser.add_argument("--l2-to-l3-pf-hint", action="store_true")

parser.add_argument("--memtrace_path", type=str, default=None) # Memtrace file path for restoring the microarchitectural state in L3 Cache

parser.add_argument("--num-dirs", type=int, default=1)
parser.add_argument("--num-l2caches", type=int, default=1)
parser.add_argument("--num-l3caches", type=int, default=1)
Expand Down
3 changes: 2 additions & 1 deletion configs/common/Simulation.py
Original file line number Diff line number Diff line change
Expand Up @@ -821,7 +821,8 @@ def run_vanilla(options, root, testsys, cpu_class):

checkpoint_dir = None
root.apply_config(options.param)
m5.instantiate(checkpoint_dir)
# add path for generic_rv_cpt and memtrace_path
m5.instantiate(pmem_file_path=options.generic_rv_cpt,mem_trace_file=options.memtrace_path,ckpt_dir=checkpoint_dir)
Comment on lines +824 to +825
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⚠️ Potential issue | 🔴 Critical

🧩 Analysis chain

🏁 Script executed:

rg -nP '\bm5\.instantiate\s*\(' -A 2

Repository: OpenXiangShan/GEM5

Length of output: 12263


🏁 Script executed:

sed -n '65,100p' src/python/m5/simulate.py

Repository: OpenXiangShan/GEM5

Length of output: 1254


🏁 Script executed:

sed -n '648,656p' configs/common/Simulation.py

Repository: OpenXiangShan/GEM5

Length of output: 496


Fix the m5.instantiate call at line 652 to match the new signature.

The new signature at line 825 requires two positional arguments (pmem_file_path and mem_trace_file), but line 652 in the same file calls m5.instantiate(checkpoint_dir) with only one argument. This will fail at runtime with a TypeError. Line 652 must be updated to pass both required arguments (or use keyword arguments like line 825).

🤖 Prompt for AI Agents
In `@configs/common/Simulation.py` around lines 824 - 825, Update the earlier call
to m5.instantiate so it matches the new signature used later: pass both
pmem_file_path and mem_trace_file (or use keyword args) in addition to
checkpoint_dir; locate the call to m5.instantiate(checkpoint_dir) and change it
to include options.generic_rv_cpt and options.memtrace_path (e.g.,
m5.instantiate(pmem_file_path=options.generic_rv_cpt,
mem_trace_file=options.memtrace_path, ckpt_dir=checkpoint_dir)) so the function
receives the required two positional/keyword arguments.


# Handle the max tick settings now that tick frequency was resolved
# during system instantiation
Expand Down
5 changes: 5 additions & 0 deletions configs/common/xiangshan.py
Original file line number Diff line number Diff line change
Expand Up @@ -227,9 +227,13 @@ def config_xiangshan_inputs(args: argparse.Namespace, sys):
sys.workload.raw_bootloader = True
else:
sys.gcpt_restorer_file = gcpt_restorer
if args.memtrace_path is not None:
sys.restore_from_memtrace = True
sys.memtrace_file = args.memtrace_path
# enable h checkpoint
if args.enable_h_gcpt:
sys.enable_h_gcpt = True

# configure DRAMSim input
if args.mem_type == 'DRAMsim3' and args.dramsim3_ini is None:
# use relative path to find the dramsim3 ini file, from configs/common/ to root
Expand Down Expand Up @@ -274,6 +278,7 @@ def build_xiangshan_system(args):
ruby = True

# Create system using FS mode with trace-specific memory configuration
# memtrace
test_sys = makeBareMetalXiangshanSystem('timing', SysConfig(mem=args.mem_size), None, np=np, ruby=ruby)

# CRITICAL FIX: Configure trace-specific memory ranges and functional TLB for trace mode
Expand Down
1 change: 1 addition & 0 deletions configs/example/kmhv3.py
Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,7 @@ def setKmhV3Params(args, system):
system.l3.prefetch_can_offload = False
system.l3.num_slices = 4


if __name__ == '__m5_main__':
FutureClass = None

Expand Down
10 changes: 10 additions & 0 deletions src/mem/cache/cache_blk.hh
Original file line number Diff line number Diff line change
Expand Up @@ -498,6 +498,16 @@ class CacheBlk : public TaggedEntry
}
}

// Public versions of some protected setters for use in restore L3 microarchitectural state
/** Set the task id value. */
void setTaskId_pub(const uint32_t task_id) { _taskId = task_id; }

/** Set the source requestor id. */
void setSrcRequestorId_pub(const uint32_t id) { _srcRequestorId = id; }

/** Set the current tick as this block's insertion tick. */
void setTickInserted_pub() { _tickInserted = curTick(); }

/** Set the XS metadata. */
void setXsMetadata(const Request::XsMetadata &xs_meta)
{
Expand Down
2 changes: 2 additions & 0 deletions src/mem/cache/replacement_policies/base.hh
Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,8 @@ class Base : public SimObject
virtual void reset(const std::shared_ptr<ReplacementData>&
replacement_data) const = 0;

virtual void reset4memtrace(const std::shared_ptr<ReplacementData>&
replacement_data,int priority) const = 0;
/**
* Find replacement victim among candidates.
*
Expand Down
3 changes: 3 additions & 0 deletions src/mem/cache/replacement_policies/bip_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,9 @@ class BIP : public LRU
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
Comment on lines +79 to +81
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⚠️ Potential issue | 🟠 Major

🧩 Analysis chain

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# Find all reset4memtrace overrides in replacement policies
rg -n "reset4memtrace\(" src/mem/cache/replacement_policies --type-add 'h:*.hh:*.hpp' -t h

Repository: OpenXiangShan/GEM5

Length of output: 121


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# Check BIP class definition to confirm it derives from LRU
head -50 src/mem/cache/replacement_policies/bip_rp.hh

Repository: OpenXiangShan/GEM5

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rg -A 5 "void reset4memtrace" src/mem/cache/replacement_policies/lru_rp.hh

Repository: OpenXiangShan/GEM5

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rg -A 5 "reset4memtrace" src/mem/cache/replacement_policies/ --type c --type h

Repository: OpenXiangShan/GEM5

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cat src/mem/cache/replacement_policies/bip_rp.hh

Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

Length of output: 249


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head -50 src/mem/cache/replacement_policies/brrip_rp.hh | grep -E "class BRRIP|public"

Repository: OpenXiangShan/GEM5

Length of output: 44


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cat src/mem/cache/replacement_policies/mru_rp.hh | grep -A 5 "reset4memtrace"

Repository: OpenXiangShan/GEM5

Length of output: 260


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# Check Random reset4memtrace implementation
cat src/mem/cache/replacement_policies/random_rp.hh | grep -A 5 "reset4memtrace"

Repository: OpenXiangShan/GEM5

Length of output: 245


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cat src/mem/cache/replacement_policies/brrip_rp.hh | head -100

Repository: OpenXiangShan/GEM5

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cat src/mem/cache/replacement_policies/mru_rp.hh | head -80

Repository: OpenXiangShan/GEM5

Length of output: 2958


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grep -l "public LRU" src/mem/cache/replacement_policies/*.hh

Repository: OpenXiangShan/GEM5

Length of output: 160


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cat src/mem/cache/replacement_policies/weighted_lru_rp.hh | grep -A 5 "reset4memtrace"

Repository: OpenXiangShan/GEM5

Length of output: 44


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cat src/mem/cache/replacement_policies/weighted_lru_rp.hh | head -100

Repository: OpenXiangShan/GEM5

Length of output: 3313


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Repository: OpenXiangShan/GEM5

Length of output: 218


BIP's empty reset4memtrace override disables LRU-based memtrace ordering.

Since BIP derives from LRU, this no-op override prevents lastTouchTick from being set during memtrace warmup (which LRU::reset4memtrace does), making replacement order arbitrary. Delegate to LRU::reset4memtrace(...) or remove the override to inherit it, consistent with WeightedLRU's pattern.

Suggested fix
-    void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
-    {     
-    }     
+    void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,
+                        int priority) const override
+    {
+        LRU::reset4memtrace(replacement_data, priority);
+    }
📝 Committable suggestion

‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.

Suggested change
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,
int priority) const override
{
LRU::reset4memtrace(replacement_data, priority);
}
🤖 Prompt for AI Agents
In `@src/mem/cache/replacement_policies/bip_rp.hh` around lines 79 - 81, The BIP
policy's override of reset4memtrace is a no-op and prevents LRU's memtrace
warmup behavior; update the BIP implementation so it delegates to the base LRU
implementation (call LRU::reset4memtrace(replacement_data, priority)) or simply
remove the override to inherit LRU::reset4memtrace, matching WeightedLRU's
pattern and ensuring lastTouchTick is set during memtrace warmup.

};

} // namespace replacement_policy
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/brrip_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -142,7 +142,9 @@ class BRRIP : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
Comment on lines +145 to +147
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⚠️ Potential issue | 🟠 Major

Implement reset4memtrace to initialize BRRIP state.

Leaving the memtrace reset hook empty means BRRIP replacement metadata won’t be initialized during memtrace warmup, which undermines the feature and can skew victim selection. At minimum, fall back to the normal reset() behavior, or map priority to an RRPV value.

🛠️ Suggested fallback
-    void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
-    {     
-    }   
+    void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
+    {
+        reset(replacement_data);
+        (void)priority;
+    }
📝 Committable suggestion

‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.

Suggested change
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
reset(replacement_data);
(void)priority;
}
🤖 Prompt for AI Agents
In `@src/mem/cache/replacement_policies/brrip_rp.hh` around lines 145 - 147, The
reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data, int
priority) const override is currently empty; implement it to initialize BRRIP
metadata during memtrace warmup by either delegating to the existing reset()
method (e.g., call reset(replacement_data)) or by mapping the provided priority
to an RRPV value and setting each line's RRPV in the ReplacementData/BRRIP state
accordingly (ensure you update the same structures used by get/set RRPV methods
so victim selection behaves correctly).

/**
* Find replacement victim using rrpv.
*
Expand Down
3 changes: 3 additions & 0 deletions src/mem/cache/replacement_policies/dueling_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -115,6 +115,9 @@ class Dueling : public Base
const PacketPtr pkt) override;
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;
void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
ReplaceableEntry* getVictim(const ReplacementCandidates& candidates) const
override;
std::shared_ptr<ReplacementData> instantiateEntry() override;
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/fifo_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,9 @@ class FIFO : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim using insertion timestamps.
*
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/lfu_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,9 @@ class LFU : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim using reference frequency.
*
Expand Down
9 changes: 9 additions & 0 deletions src/mem/cache/replacement_policies/lru_rp.cc
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,15 @@ LRU::reset(const std::shared_ptr<ReplacementData>& replacement_data) const
replacement_data)->lastTouchTick = curTick();
}

void
LRU::reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const
{
// Set last touch timestamp
// Here we use priority to set lastTouchTick, the lower the priority, the older the lastTouchTick
std::static_pointer_cast<LRUReplData>(
replacement_data)->lastTouchTick = curTick() - priority;
}
Comment on lines +73 to +80
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⚠️ Potential issue | 🟠 Major

🧩 Analysis chain

🏁 Script executed:

#!/bin/bash
# Search for Tick typedef and using declarations
echo "=== Tick type definitions ==="
rg -n "typedef\s+.*Tick|using\s+Tick" -S 2>/dev/null || echo "No matches found"

echo -e "\n=== reset4memtrace call sites ==="
rg -n "reset4memtrace\(" -S 2>/dev/null || echo "No matches found"

echo -e "\n=== File structure context ==="
fd -t f "lru_rp\.(cc|hh)" | head -5

Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

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# Check the call sites to understand what priority values are passed
echo "=== sector_tags.cc reset4memtrace call ==="
rg -n -B 5 -A 2 "reset4memtrace\(blk->replacementData,priority\)" src/mem/cache/tags/sector_tags.cc

echo -e "\n=== base_set_assoc.hh reset4memtrace call ==="
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Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

Length of output: 217


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Repository: OpenXiangShan/GEM5

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Repository: OpenXiangShan/GEM5

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Guard against tick underflow when applying memtrace priority.

The priority parameter is parsed from a memtrace file via std::stoi(rank) without validation. If priority is negative or exceeds curTick(), the subtraction curTick() - priority causes unsigned integer underflow, inverting LRU ordering during warmup. Clamp or validate priority to prevent silent corruption of cache replacement state.

🤖 Prompt for AI Agents
In `@src/mem/cache/replacement_policies/lru_rp.cc` around lines 73 - 80, In
LRU::reset4memtrace, guard against unsigned underflow when computing
lastTouchTick = curTick() - priority by validating/clamping the parsed memtrace
priority: ensure priority is non-negative and not greater than curTick() before
subtracting. Locate the method LRU::reset4memtrace and the use of
std::static_pointer_cast<LRUReplData>(replacement_data)->lastTouchTick, and
replace the direct subtraction with a clamped value (e.g., use min(max(priority,
0), curTick())) or equivalent logic so lastTouchTick never underflows.


ReplaceableEntry*
LRU::getVictim(const ReplacementCandidates& candidates) const
{
Expand Down
2 changes: 2 additions & 0 deletions src/mem/cache/replacement_policies/lru_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -93,6 +93,8 @@ class LRU : public Base
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override;

/**
* Find replacement victim using LRU timestamps.
*
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/mru_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,9 @@ class MRU : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim using access timestamps.
*
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/random_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,9 @@ class Random : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim at random.
*
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/second_chance_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -109,7 +109,9 @@ class SecondChance : public FIFO
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim using insertion timestamps and second chance
* bit.
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/ship_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,9 @@ class SHiP : public BRRIP
const PacketPtr pkt) override;
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Instantiate a replacement data entry.
*
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/tree_plru_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -186,7 +186,9 @@ class TreePLRU : public Base
*/
void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find replacement victim using TreePLRU bits. It is assumed that all
* candidates share the same replacement data tree.
Expand Down
4 changes: 3 additions & 1 deletion src/mem/cache/replacement_policies/xs_drrip_rp.hh
Original file line number Diff line number Diff line change
Expand Up @@ -203,7 +203,9 @@ class XSDRRIP : public Base

void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
override;

void reset4memtrace(const std::shared_ptr<ReplacementData>& replacement_data,int priority) const override
{
}
/**
* Find victim for replacement
*/
Expand Down
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