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Change-Id: I8b6a4bda945564cc961251fc1297a6bacd8636cb
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📝 WalkthroughWalkthroughReplaces a lightweight MicroTAGE stub with a full TimedBaseBTBPredictor-based MicroTAGE implementation, adds its sources to the build, updates DecoupledBPUWithBTB to use Changes
Sequence Diagram(s)sequenceDiagram
participant Fetch as Fetch Stage
participant Micro as MicroTAGE
participant Tables as TAGE Tables
participant History as Folded History
Fetch->>Micro: generateSinglePrediction(addr, BTBEntry)
Micro->>History: compute folded indices/tags (getTageIndex/getTageTag)
History-->>Micro: folded indices/tags
Micro->>Tables: lookupHelper(query per-table indices/tags)
Tables-->>Micro: per-table entries & tags
Micro->>Micro: select main/alt prediction (matchTag, choose)
Micro-->>Fetch: return prediction + meta
sequenceDiagram
participant Execute as Execute/Retire Stage
participant Micro as MicroTAGE
participant History as Folded History
participant Tables as TAGE Tables
participant Stats as Statistics
Execute->>Micro: update(FetchStream with actual outcome)
Micro->>Micro: prepareUpdateEntries -> updatePredictorStateAndCheckAllocation
Micro->>History: doUpdateHist / specUpdatePHist (speculative or commit)
Micro->>Tables: update counters, useful bits, allocate entries if needed
Micro->>Stats: record events (mispred, alloc, bank-conflict)
Micro-->>Execute: update complete
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Possibly related PRs
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Change-Id: I914d05c0a29ce57989ba63bf2b46595c62cfcc0a
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Actionable comments posted: 3
🤖 Fix all issues with AI agents
In `@src/cpu/pred/btb/microtage.cc`:
- Around line 826-831: getBankId() can produce values >= numBanks when numBanks
is not a power of two because bankIdWidth = ceilLog2(numBanks); update getBankId
(or its callers) to ensure the returned bank ID is within [0, numBanks-1] —
either assert that numBanks is a power of two at initialization or clamp the
computed value using numBanks (e.g., id = ((pc >> bankBaseShift) & ((1 <<
bankIdWidth) - 1)); return std::min(id, numBanks - 1u)); and ensure references
to bankBaseShift, bankIdWidth, numBanks, and getBankId are the locations you
modify so per‑bank stats vectors never get indexed out of bounds.
- Around line 738-769: The mask creation in getTageTag and getTageIndex uses
(1ULL << tableTagBits[t]) - 1 and (1ULL << tableIndexBits[t]) - 1 which can
invoke shift-by-width UB if the bit counts are >= width of the type; change both
functions to compute a safe mask by bounding the shift amount against the target
width (e.g., if bits >= sizeof(Addr)*8 then set mask = ~Addr(0) else mask =
(Addr(1) << bits) - 1), and use tableTagBits[t] and tableIndexBits[t] in that
guarded computation so misconfiguration cannot cause undefined behavior.
In `@src/cpu/pred/btb/microtage.hh`:
- Around line 305-367: TageStats members are uninitialized in UNIT_TEST builds
causing UB (e.g., updateProviderNa++ reads garbage); fix by value-initializing
the global instance—replace the default-initialized declaration of TageStats
tageStats with a value-initialized instance (TageStats tageStats{}) so all
Scalar and int members start at zero; this avoids adding a constructor and fixes
issues in updateProviderNa, updateUseAlt, etc.
🧹 Nitpick comments (1)
src/cpu/pred/btb/microtage.cc (1)
330-335: Avoid double-counting stats across pipeline stages.
lookupHelperupdatestageStats, but it’s called once per stage, so the same prediction can be counted multiple times. Consider caching the lookup once per cycle and reusing results for later stages.
| // Calculate TAGE tag with folded history - optimized version using bitwise operations | ||
| Addr | ||
| MicroTAGE::getTageTag(Addr pc, int t, uint64_t foldedHist, uint64_t altFoldedHist, Addr position) | ||
| { | ||
| // Create mask for tableTagBits[t] to limit result size | ||
| Addr mask = (1ULL << tableTagBits[t]) - 1; | ||
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| // Extract lower bits of PC directly (remove instruction alignment bits) | ||
| Addr pcBits = (pc >> bankBaseShift) & mask; | ||
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| // Extract and prepare folded history bits | ||
| Addr foldedBits = foldedHist & mask; | ||
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| // Extract alt tag bits and shift left by 1 | ||
| Addr altTagBits = (altFoldedHist << 1) & mask; | ||
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| // XOR all components together, including position (like RTL) | ||
| return pcBits ^ foldedBits ^ position ^ altTagBits; | ||
| } | ||
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| Addr | ||
| MicroTAGE::getTageIndex(Addr pc, int t, uint64_t foldedHist) | ||
| { | ||
| // Create mask for tableIndexBits[t] to limit result size | ||
| Addr mask = (1ULL << tableIndexBits[t]) - 1; | ||
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| const unsigned pcShift = enableBankConflict ? indexShift : bankBaseShift; | ||
| Addr pcBits = (pc >> pcShift) & mask; | ||
| Addr foldedBits = foldedHist & mask; | ||
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| return pcBits ^ foldedBits; | ||
| } |
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Guard against shift-by-width undefined behavior in mask creation.
(1ULL << tableTagBits[t]) - 1 and (1ULL << tableIndexBits[t]) - 1 invoke undefined behavior when shift amounts ≥ 64. Although in-practice values are small (8–16 bits), these parameters are user-configurable. Add defensive bounds checks to prevent UB if misconfigured.
🛠️ Suggested fix (safe mask creation)
- Addr mask = (1ULL << tableTagBits[t]) - 1;
+ const unsigned tagBits = tableTagBits[t];
+ Addr mask = (tagBits >= (sizeof(Addr) * 8))
+ ? ~Addr(0)
+ : ((Addr(1) << tagBits) - 1);
...
- Addr mask = (1ULL << tableIndexBits[t]) - 1;
+ const unsigned indexBits = tableIndexBits[t];
+ Addr mask = (indexBits >= (sizeof(Addr) * 8))
+ ? ~Addr(0)
+ : ((Addr(1) << indexBits) - 1);🤖 Prompt for AI Agents
In `@src/cpu/pred/btb/microtage.cc` around lines 738 - 769, The mask creation in
getTageTag and getTageIndex uses (1ULL << tableTagBits[t]) - 1 and (1ULL <<
tableIndexBits[t]) - 1 which can invoke shift-by-width UB if the bit counts are
>= width of the type; change both functions to compute a safe mask by bounding
the shift amount against the target width (e.g., if bits >= sizeof(Addr)*8 then
set mask = ~Addr(0) else mask = (Addr(1) << bits) - 1), and use tableTagBits[t]
and tableIndexBits[t] in that guarded computation so misconfiguration cannot
cause undefined behavior.
| unsigned | ||
| MicroTAGE::getBankId(Addr pc) const | ||
| { | ||
| // Extract bank ID bits after removing instruction alignment | ||
| return (pc >> bankBaseShift) & ((1 << bankIdWidth) - 1); | ||
| } |
There was a problem hiding this comment.
Validate bank ID range for non‑power‑of‑two numBanks.
bankIdWidth = ceilLog2(numBanks) means getBankId() can return values ≥ numBanks if numBanks isn’t a power of two, which can go out-of-bounds on per‑bank stats vectors. Either enforce power‑of‑two or clamp.
🛠️ Suggested fix (assert power‑of‑two)
unsigned
MicroTAGE::getBankId(Addr pc) const
{
+ assert(numBanks && (numBanks & (numBanks - 1)) == 0);
// Extract bank ID bits after removing instruction alignment
return (pc >> bankBaseShift) & ((1 << bankIdWidth) - 1);
}📝 Committable suggestion
‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| unsigned | |
| MicroTAGE::getBankId(Addr pc) const | |
| { | |
| // Extract bank ID bits after removing instruction alignment | |
| return (pc >> bankBaseShift) & ((1 << bankIdWidth) - 1); | |
| } | |
| unsigned | |
| MicroTAGE::getBankId(Addr pc) const | |
| { | |
| assert(numBanks && (numBanks & (numBanks - 1)) == 0); | |
| // Extract bank ID bits after removing instruction alignment | |
| return (pc >> bankBaseShift) & ((1 << bankIdWidth) - 1); | |
| } |
🤖 Prompt for AI Agents
In `@src/cpu/pred/btb/microtage.cc` around lines 826 - 831, getBankId() can
produce values >= numBanks when numBanks is not a power of two because
bankIdWidth = ceilLog2(numBanks); update getBankId (or its callers) to ensure
the returned bank ID is within [0, numBanks-1] — either assert that numBanks is
a power of two at initialization or clamp the computed value using numBanks
(e.g., id = ((pc >> bankBaseShift) & ((1 << bankIdWidth) - 1)); return
std::min(id, numBanks - 1u)); and ensure references to bankBaseShift,
bankIdWidth, numBanks, and getBankId are the locations you modify so per‑bank
stats vectors never get indexed out of bounds.
| #ifdef UNIT_TEST | ||
| struct TageStats | ||
| { | ||
| #else | ||
| struct TageStats : public statistics::Group | ||
| { | ||
| #endif | ||
| Scalar predNoHitUseBim; | ||
| Scalar predUseAlt; | ||
| Scalar updateNoHitUseBim; | ||
| Scalar updateUseAlt; | ||
| Scalar updateUseAltCorrect; | ||
| Scalar updateUseAltWrong; | ||
| Scalar updateAltDiffers; | ||
| Scalar updateUseAltOnNaUpdated; | ||
| Scalar updateProviderNa; | ||
| Scalar updateUseNaCorrect; | ||
| Scalar updateUseNaWrong; | ||
| Scalar updateUseAltOnNaCorrect; | ||
| Scalar updateUseAltOnNaWrong; | ||
| Scalar updateAllocFailure; | ||
| Scalar updateAllocFailureNoValidTable; | ||
| Scalar updateAllocSuccess; | ||
| Scalar updateMispred; | ||
| Scalar updateResetU; | ||
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| Scalar updateUtageHit; | ||
| Scalar updateUtageWrong; | ||
|
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| // Bank conflict statistics | ||
| Scalar updateBankConflict; // Number of bank conflicts detected | ||
| Scalar updateDeferredDueToConflict; // Number of updates deferred due to bank conflict (retried later) | ||
|
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| #ifndef UNIT_TEST | ||
| // Fine-grained per-bank statistics | ||
| statistics::Vector updateBankConflictPerBank; // Conflicts per bank | ||
| statistics::Vector updateAccessPerBank; // Update accesses per bank | ||
| statistics::Vector predAccessPerBank; // Prediction accesses per bank | ||
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| statistics::Distribution predTableHits; | ||
| statistics::Distribution updateTableHits; | ||
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| statistics::Vector updateTableMispreds; | ||
| #endif | ||
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| Scalar condPredwrong; | ||
| Scalar condMissTakens; | ||
| Scalar condCorrect; | ||
| Scalar condMissNoTakens; | ||
| Scalar predHit; | ||
| Scalar predMiss; | ||
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| int bankIdx; | ||
| int numPredictors; | ||
| int numBanks; | ||
|
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| #ifndef UNIT_TEST | ||
| TageStats(statistics::Group* parent, int numPredictors, int numBanks); | ||
| #endif | ||
| void updateStatsWithTagePrediction(const TagePrediction &pred, bool when_pred); | ||
| } ; | ||
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| TageStats tageStats; |
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Zero-initialize TageStats for UNIT_TEST builds.
In UNIT_TEST, TageStats has no constructor, so Scalar (uint64_t) members are uninitialized. Operations like updateProviderNa++ then perform UB by reading uninitialized values. Use value-initialization to zero the members.
Suggested fix
- TageStats tageStats;
+ TageStats tageStats{};📝 Committable suggestion
‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| #ifdef UNIT_TEST | |
| struct TageStats | |
| { | |
| #else | |
| struct TageStats : public statistics::Group | |
| { | |
| #endif | |
| Scalar predNoHitUseBim; | |
| Scalar predUseAlt; | |
| Scalar updateNoHitUseBim; | |
| Scalar updateUseAlt; | |
| Scalar updateUseAltCorrect; | |
| Scalar updateUseAltWrong; | |
| Scalar updateAltDiffers; | |
| Scalar updateUseAltOnNaUpdated; | |
| Scalar updateProviderNa; | |
| Scalar updateUseNaCorrect; | |
| Scalar updateUseNaWrong; | |
| Scalar updateUseAltOnNaCorrect; | |
| Scalar updateUseAltOnNaWrong; | |
| Scalar updateAllocFailure; | |
| Scalar updateAllocFailureNoValidTable; | |
| Scalar updateAllocSuccess; | |
| Scalar updateMispred; | |
| Scalar updateResetU; | |
| Scalar updateUtageHit; | |
| Scalar updateUtageWrong; | |
| // Bank conflict statistics | |
| Scalar updateBankConflict; // Number of bank conflicts detected | |
| Scalar updateDeferredDueToConflict; // Number of updates deferred due to bank conflict (retried later) | |
| #ifndef UNIT_TEST | |
| // Fine-grained per-bank statistics | |
| statistics::Vector updateBankConflictPerBank; // Conflicts per bank | |
| statistics::Vector updateAccessPerBank; // Update accesses per bank | |
| statistics::Vector predAccessPerBank; // Prediction accesses per bank | |
| statistics::Distribution predTableHits; | |
| statistics::Distribution updateTableHits; | |
| statistics::Vector updateTableMispreds; | |
| #endif | |
| Scalar condPredwrong; | |
| Scalar condMissTakens; | |
| Scalar condCorrect; | |
| Scalar condMissNoTakens; | |
| Scalar predHit; | |
| Scalar predMiss; | |
| int bankIdx; | |
| int numPredictors; | |
| int numBanks; | |
| #ifndef UNIT_TEST | |
| TageStats(statistics::Group* parent, int numPredictors, int numBanks); | |
| #endif | |
| void updateStatsWithTagePrediction(const TagePrediction &pred, bool when_pred); | |
| } ; | |
| TageStats tageStats; | |
| `#ifdef` UNIT_TEST | |
| struct TageStats | |
| { | |
| `#else` | |
| struct TageStats : public statistics::Group | |
| { | |
| `#endif` | |
| Scalar predNoHitUseBim; | |
| Scalar predUseAlt; | |
| Scalar updateNoHitUseBim; | |
| Scalar updateUseAlt; | |
| Scalar updateUseAltCorrect; | |
| Scalar updateUseAltWrong; | |
| Scalar updateAltDiffers; | |
| Scalar updateUseAltOnNaUpdated; | |
| Scalar updateProviderNa; | |
| Scalar updateUseNaCorrect; | |
| Scalar updateUseNaWrong; | |
| Scalar updateUseAltOnNaCorrect; | |
| Scalar updateUseAltOnNaWrong; | |
| Scalar updateAllocFailure; | |
| Scalar updateAllocFailureNoValidTable; | |
| Scalar updateAllocSuccess; | |
| Scalar updateMispred; | |
| Scalar updateResetU; | |
| Scalar updateUtageHit; | |
| Scalar updateUtageWrong; | |
| // Bank conflict statistics | |
| Scalar updateBankConflict; // Number of bank conflicts detected | |
| Scalar updateDeferredDueToConflict; // Number of updates deferred due to bank conflict (retried later) | |
| `#ifndef` UNIT_TEST | |
| // Fine-grained per-bank statistics | |
| statistics::Vector updateBankConflictPerBank; // Conflicts per bank | |
| statistics::Vector updateAccessPerBank; // Update accesses per bank | |
| statistics::Vector predAccessPerBank; // Prediction accesses per bank | |
| statistics::Distribution predTableHits; | |
| statistics::Distribution updateTableHits; | |
| statistics::Vector updateTableMispreds; | |
| `#endif` | |
| Scalar condPredwrong; | |
| Scalar condMissTakens; | |
| Scalar condCorrect; | |
| Scalar condMissNoTakens; | |
| Scalar predHit; | |
| Scalar predMiss; | |
| int bankIdx; | |
| int numPredictors; | |
| int numBanks; | |
| `#ifndef` UNIT_TEST | |
| TageStats(statistics::Group* parent, int numPredictors, int numBanks); | |
| `#endif` | |
| void updateStatsWithTagePrediction(const TagePrediction &pred, bool when_pred); | |
| } ; | |
| TageStats tageStats{}; |
🤖 Prompt for AI Agents
In `@src/cpu/pred/btb/microtage.hh` around lines 305 - 367, TageStats members are
uninitialized in UNIT_TEST builds causing UB (e.g., updateProviderNa++ reads
garbage); fix by value-initializing the global instance—replace the
default-initialized declaration of TageStats tageStats with a value-initialized
instance (TageStats tageStats{}) so all Scalar and int members start at zero;
this avoids adding a constructor and fixes issues in updateProviderNa,
updateUseAlt, etc.
🚀 Coremark Smoke Test Results
✅ Difftest smoke test passed! |
|
[Generated by GEM5 Performance Robot] Align BTB PerformanceOverall Score
[Generated by GEM5 Performance Robot] Align BTB PerformanceOverall Score
|
Change-Id: Id4e6f99f3399aef5d06aa8abb7eb2e118632e4ea
|
[Generated by GEM5 Performance Robot] Align BTB PerformanceOverall Score
[Generated by GEM5 Performance Robot] Align BTB PerformanceOverall Score
|
Change-Id: Iba1c0e49894e5662f12316054af294a52f338a06
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Actionable comments posted: 1
🤖 Fix all issues with AI agents
In `@src/cpu/pred/BranchPredictor.py`:
- Around line 1074-1081: The vector parameter lengths for the MicroTAGE
configuration (tableSizes, TTagBitSizes, TTagPcShifts, histLengths) do not match
numPredictors and will trigger constructor asserts; update these so their
lengths equal numPredictors: either change numPredictors to 2 if you intend two
TAGE tables, or shrink tableSizes, TTagBitSizes, TTagPcShifts, and histLengths
to single-element vectors to match numPredictors = 1; locate and edit the
declarations of numPredictors, tableSizes, TTagBitSizes, TTagPcShifts, and
histLengths in the MicroTAGE class so the vector counts are consistent with the
constructor's predictor loop.
🧹 Nitpick comments (1)
src/cpu/pred/BranchPredictor.py (1)
1066-1091: Minor: Inconsistent spacing in parameter descriptions.Several parameter definitions are missing spaces after commas/colons (e.g.,
[512]*2,"the TAGE..."vs the conventional[512]*2, "the TAGE..."). This is a minor style inconsistency compared to the rest of the file.
| # Keep vector parameters consistent with numPredictors to avoid constructor asserts. | ||
| numPredictors = Param.Unsigned(1, "Number of TAGE predictors") | ||
| tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length") | ||
| TTagBitSizes = VectorParam.Unsigned([16]*2 ,"the T0~Tn entry's tag bit size") | ||
| TTagPcShifts = VectorParam.Unsigned([1]*2 ,"when the T0~Tn entry's tag generating, PC right shift") | ||
| blockSize = Param.Unsigned(32,"tage index function uses 32B aligned block address") | ||
|
|
||
| histLengths = VectorParam.Unsigned([9,18],"the BTB TAGE T0~Tn history length") |
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🧩 Analysis chain
🏁 Script executed:
#!/bin/bash
# Extract MicroTAGE class definition from BranchPredictor.py
echo "=== MicroTAGE class (lines 1074-1081 area) ==="
sed -n '1066,1095p' src/cpu/pred/BranchPredictor.py
echo ""
echo "=== BTBTAGE class for comparison (lines 1047-1053 area) ==="
sed -n '1040,1055p' src/cpu/pred/BranchPredictor.pyRepository: OpenXiangShan/GEM5
Length of output: 3078
🏁 Script executed:
#!/bin/bash
# Find C++ constructor files for MicroTAGE
find src/cpu/pred -name "*microtage*" -o -name "*btb_tage*" | head -20Repository: OpenXiangShan/GEM5
Length of output: 334
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#!/bin/bash
# Search for numPredictors validation in C++ files
rg -n "numPredictors" src/cpu/pred --type cc -B 2 -A 5 2>/dev/null | head -100Repository: OpenXiangShan/GEM5
Length of output: 44
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#!/bin/bash
# Search for MicroTAGE constructor in C++ files
echo "=== MicroTAGE constructor in microtage.cc ==="
rg -n "MicroTAGE::" src/cpu/pred/btb/microtage.cc -A 30 | head -80Repository: OpenXiangShan/GEM5
Length of output: 3049
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#!/bin/bash
# Search for parameter size validation in constructor
echo "=== Size validation in microtage.cc ==="
rg -n "assert|size|numPredictors|tableSizes" src/cpu/pred/btb/microtage.cc -B 2 -A 2 | head -100Repository: OpenXiangShan/GEM5
Length of output: 4110
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#!/bin/bash
# Check the microtage.hh header file for constructor signature
echo "=== MicroTAGE header file ==="
cat -n src/cpu/pred/btb/microtage.hh | head -100Repository: OpenXiangShan/GEM5
Length of output: 4142
Fix parameter size mismatch in MicroTAGE class definition.
The comment explicitly warns to "Keep vector parameters consistent with numPredictors to avoid constructor asserts," but the configuration violates this:
numPredictors = 1tableSizes,TTagBitSizes,TTagPcShifts,histLengthsall have 2 elements
Only index 0 of each vector is used in the constructor loop; index 1 is wasted. Either set numPredictors to 2 or reduce all vectors to 1 element. Comparing with BTBTAGE (lines 1047-1053), which has numPredictors = 8 with all vectors containing exactly 8 elements, shows the correct pattern.
Proposed fix: Either set numPredictors to 2, or reduce vectors to 1 element
Option A (if 2 TAGE tables are intended):
- numPredictors = Param.Unsigned(1, "Number of TAGE predictors")
+ numPredictors = Param.Unsigned(2, "Number of TAGE predictors")Option B (if 1 TAGE table is intended):
- tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length")
- TTagBitSizes = VectorParam.Unsigned([16]*2 ,"the T0~Tn entry's tag bit size")
- TTagPcShifts = VectorParam.Unsigned([1]*2 ,"when the T0~Tn entry's tag generating, PC right shift")
+ tableSizes = VectorParam.Unsigned([512],"the TAGE T0~Tn length")
+ TTagBitSizes = VectorParam.Unsigned([16],"the T0~Tn entry's tag bit size")
+ TTagPcShifts = VectorParam.Unsigned([1],"when the T0~Tn entry's tag generating, PC right shift")
blockSize = Param.Unsigned(32,"tage index function uses 32B aligned block address")
- histLengths = VectorParam.Unsigned([9,18],"the BTB TAGE T0~Tn history length")
+ histLengths = VectorParam.Unsigned([9],"the BTB TAGE T0~Tn history length")🧰 Tools
🪛 Ruff (0.14.13)
1075-1075: Param may be undefined, or defined from star imports
(F405)
1076-1076: VectorParam may be undefined, or defined from star imports
(F405)
1077-1077: VectorParam may be undefined, or defined from star imports
(F405)
1078-1078: VectorParam may be undefined, or defined from star imports
(F405)
1079-1079: Param may be undefined, or defined from star imports
(F405)
1081-1081: VectorParam may be undefined, or defined from star imports
(F405)
🤖 Prompt for AI Agents
In `@src/cpu/pred/BranchPredictor.py` around lines 1074 - 1081, The vector
parameter lengths for the MicroTAGE configuration (tableSizes, TTagBitSizes,
TTagPcShifts, histLengths) do not match numPredictors and will trigger
constructor asserts; update these so their lengths equal numPredictors: either
change numPredictors to 2 if you intend two TAGE tables, or shrink tableSizes,
TTagBitSizes, TTagPcShifts, and histLengths to single-element vectors to match
numPredictors = 1; locate and edit the declarations of numPredictors,
tableSizes, TTagBitSizes, TTagPcShifts, and histLengths in the MicroTAGE class
so the vector counts are consistent with the constructor's predictor loop.
2 participants
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