mem-cache: stream add hysteresis

[Maxpicca-Li]

Change-Id: I710e7645a78dc48cf890e9223b76d92bc0a43d2a
Config: kmhv3, 0.8 coverage
Result: a little improvement, especially GemsFDTD and zeusmp

Data before rebasing xs-dev:

Summary by CodeRabbit

• Refactor
  • Improved cache stream prefetcher replacement logic to optimize handling of repeated stream accesses through enhanced entry state tracking and deferred replacement handling.

_{✏️ Tip: You can customize this high-level summary in your review settings.}

[coderabbitai]

📝 Walkthrough

Walkthrough

The STREAM cache prefetcher now implements a hysteresis-based replacement policy. On cache hits, a hysteresis flag is set on the entry. On misses, the victim replacement logic conditionally either reinserts the entry with its previous state (if hysteresis is set) or initializes a new mapping, with the function returning nullptr for misses instead of the newly created entry.

Changes

Cohort / File(s)	Summary
STREAM Entry Structure src/mem/cache/prefetch/xs_stream.hh	Added bool hysteresis field to STREAMEntry struct with default initialization to false, expanding per-entry state tracking.
Cache Lookup & Replacement Logic src/mem/cache/prefetch/xs_stream.cc	Modified hit/miss path handling: on hit, set hysteresis flag; on miss, restructured victim replacement to conditionally preserve entries with hysteresis set (reinserting with previous tag/state) or initialize new mappings. Function now returns nullptr on miss instead of the updated entry.

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~20 minutes

Suggested reviewers

• happy-lx
• tastynoob
• jensen-yan

Poem

🐰 A hysteresis hop, a memory's dear friend,
When streams collide, let not good entries end!
We mark them with flags, preserve what we treasure,
The cache now remembers at a gentler measure. ✨

Pre-merge checks and finishing touches

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Docstring Coverage	⚠️ Warning	Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%.	You can run @coderabbitai generate docstrings to improve docstring coverage.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Description Check	✅ Passed	Check skipped - CodeRabbit’s high-level summary is enabled.
Title check	✅ Passed	The title 'mem-cache: stream add hysteresis' directly and concisely describes the main change: adding a hysteresis mechanism to the stream prefetch logic in the memory cache subsystem.

✨ Finishing touches

• 📝 Generate docstrings

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[XiangShanRobot]

[Generated by GEM5 Performance Robot]
commit: 93844f9
workflow: gem5 Performance Test (Tier 2 - Post-Merge)

Standard Performance

Overall Score

	PR	Master	Diff(%)
Score	15.33	15.75	-2.72 🔴

[XiangShanRobot]

[Generated by GEM5 Performance Robot]
commit: ef72cc0
workflow: gem5 Performance Test (Tier 2 - Post-Merge)

Standard Performance

Overall Score

	PR	Master	Diff(%)
Score	15.76	15.75	+0.03 🟢

[coderabbitai]

Actionable comments posted: 1

🧹 Nitpick comments (1)

src/mem/cache/prefetch/xs_stream.cc (1)

112-112: Redundant assignment in else branch.

Line 112 sets entry->hysteresis = false;, but this is redundant when the else branch (line 106) is taken because the condition if (entry->hysteresis) at line 103 already failed, meaning hysteresis was false. While this defensive assignment doesn't hurt, it's unnecessary.

Optional cleanup

         entry->tag = regionHashTag(vaddr_tag_num);
         entry->decrMode = decr;
         entry->bitVec = 1UL << vaddr_offset;
         entry->cnt = 1;
         entry->active = in_active_page;
-        entry->hysteresis = false;
         stream_array.insertEntry(regionHashTag(vaddr_tag_num), secure, entry);

📜 Review details

Configuration used: defaults

Review profile: CHILL

Plan: Pro

📥 Commits

Reviewing files that changed from the base of the PR and between ecce168 and ef72cc0.

📒 Files selected for processing (2)

• src/mem/cache/prefetch/xs_stream.cc
• src/mem/cache/prefetch/xs_stream.hh

🧰 Additional context used

🧬 Code graph analysis (1)

src/mem/cache/prefetch/xs_stream.cc (1)

src/mem/cache/prefetch/base.hh (1)

• secure (161-164)

🔇 Additional comments (3)

src/mem/cache/prefetch/xs_stream.hh (1)

78-78: LGTM: Clean field addition.

The hysteresis field is properly initialized with an in-class default and follows the same pattern as other boolean fields in the struct.

src/mem/cache/prefetch/xs_stream.cc (2)

96-96: LGTM: Hysteresis flag set on hit.

Setting the hysteresis flag on cache hits correctly marks the entry for deferred replacement, implementing a "second chance" eviction policy.

---

105-105: Both insertEntry calls are correct — no API signature mismatch.

The AssociativeSet::insertEntry method has a single signature with an optional fourth parameter:

void insertEntry(Addr addr, bool is_secure, Entry* entry, bool with_reset = true);

• Line 105 explicitly passes false to skip replacement policy reset during reinsertion of an existing entry with hysteresis flag cleared.
• Line 113 uses the default true for a fresh entry insertion with full initialization.

Both usages are semantically correct and follow the intended API.