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@cindy-q cindy-q commented Oct 2, 2023

Scope-block-design
Documentation WIP

cindy-q and others added 30 commits September 29, 2023 16:44
…rence. Makefile change to generate devicetree with overlay. Added a generic UIO interrupt overlay for the dma_rx core. Added blank overlays for the other projects to accomodate the Makefile change
- new opcode LITR
- halt and litr interrupt added
- simulation test to validate litr, halt, and pause.
…ut. still need to add 4 channels, update rx tx, and add new board for 4-input RP
… will revisit again once the rx and tx chain has been updated. addex fix on core generation to also include systemverilog files
- added manual spi write to the dac.
- added phase offset to the pll_adc to offset internal routing through the fpga.
- script modified to look for sv files.
…trol and pattern validation logic added for manual tuning
@cindy-q cindy-q changed the base branch from main to main-next June 20, 2024 20:08
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