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@timlee66 timlee66 commented Jan 9, 2026

Corrected the low-voltage control devicetree mappings for npcm4

- Rewrote npcm-lvol-ctrl-map.dtsi with NPCM4-compliant mappings
  * Mapped all 30 hardware register bits to correct LV_CTL registers
  * LV_CTL0 (0x2A): 6 I2C SDA signals (SMB1-5)
  * LV_CTL1 (0x2B): 6 I2C SCL signals + 2 power signals
  * LV_CTL3 (0x2D): 8 I2C SDA signals (SMB6-12)
  * LV_CTL4 (0x6E): 8 I2C SCL signals (SMB6-12)

- Updated all 16 GPIO ports in npcm4.dtsi with correct lvol-maps
  * GPIO1: io11, io13, io16, io17
  * GPIO2: io25, io26
  * GPIO3: io32-37
  * GPIO6: io60, io61
  * GPIOA: ioa2, ioa7
  * GPIOC: ioc2, ioc3, ioc6, ioc7
  * GPIOD: iod2-7
  * GPIOF: iof0, iof1
  * All other ports: lvol_none (no LV support)

Corrected the low-voltage control devicetree mappings for npcm4

Changes:
- Rewrote npcm-lvol-ctrl-map.dtsi with NPCM4-compliant mappings
  * Mapped all 30 hardware register bits to correct LV_CTL registers
  * LV_CTL0 (0x2A): 6 I2C SDA signals (SMB1-5)
  * LV_CTL1 (0x2B): 6 I2C SCL signals + 2 power signals
  * LV_CTL3 (0x2D): 8 I2C SDA signals (SMB6-12)
  * LV_CTL4 (0x6E): 8 I2C SCL signals (SMB6-12)

- Updated all 16 GPIO ports in npcm4.dtsi with correct lvol-maps
  * GPIO1: io11, io13, io16, io17
  * GPIO2: io25, io26
  * GPIO3: io32-37
  * GPIO6: io60, io61
  * GPIOA: ioa2, ioa7
  * GPIOC: ioc2, ioc3, ioc6, ioc7
  * GPIOD: iod2-7
  * GPIOF: iof0, iof1
  * All other ports: lvol_none (no LV support)

Signed-off-by: Tim Lee <CHLi30@nuvoton.com>
@maxdog988 maxdog988 merged commit 31cc33e into Nuvoton-Israel:joseph/npcm4_to_npcmx Jan 9, 2026
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2 participants