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[6.17] backport gpio patches for Tegra 256, tegra 186, tegra410 Edit #270

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[6.17] backport gpio patches for Tegra 256, tegra 186, tegra410 Edit #270

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@nirmoy nirmoy commented Jan 8, 2026

Cherry-pick GPIO related patches for few Tegra CPUs:

dt-bindings: gpio: Add Tegra256 support https://git.kernel.org/torvalds/c/eef6dcbc52fa
gpio: tegra186: Add support for Tegra256 https://git.kernel.org/torvalds/c/db12ee08726e
Revert partial "gpio: tegra186: Use generic macro for port definitions "
gpio: tegra186: Use generic macro for port definitions https://git.kernel.org/torvalds/c/f75db6f7f907
gpio: tegra186: Fix GPIO name collisions for Tegra410 https://git.kernel.org/torvalds/c/67f9b828d4e5
i2c: tegra: Add Tegra256 support https://git.kernel.org/torvalds/c/6e3cb25e62f2

https://bugs.launchpad.net/ubuntu/+source/linux-nvidia/+bug/2137739

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clsotog approved these changes Jan 8, 2026
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Acked-by: Carol L Soto <csoto@nvidia.com>

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jamieNguyenNVIDIA commented Jan 8, 2026

I see some line number diffs between ec5cd91 vs. the original (f75db6f), so I suppose the trailer should indicate that this is a backport rather than a cherry-pick. But other than that...

Acked-by: Jamie Nguyen <jamien@nvidia.com>

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nvmochs commented Jan 9, 2026

@nirmoy Two comments

  • Did you intend to also pick the i2c patch with this PR? I was planning on including that in my i2c PR - I'm fine either way, just wanted to double check since the PR title was GPIO-centric.

  • I agree with Jamie about ed96a96. Perhaps it would be better to also revert 5443ed9 gpio: tegra186: Add support for Tegra410, which I had to fix up when I originally added it to this kernel due to the lack of the Tegra256 patch. I think then everything would pick clean.

Basically you would want to revert these 2 first:
5443ed9 gpio: tegra186: Add support for Tegra410
32b89e4 gpio: tegra186: Use generic macro for port definitions

And then pick the content from upstream starting with "dt-bindings: gpio: Add Tegra256 support".

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nirmoy commented Jan 9, 2026

Thanks @jamieNguyenNVIDIA, @nvmochs . Updated with bacported tag for original (f75db6f), removed i2c patch and also reverted "gpio: tegra186: Add support for Tegra410" to restore the original patch.

@nvmochs I2C patch was next the GPIO, I blindly picked it up

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nirmoy commented Jan 9, 2026

Clubing reverts together, made later cherry pick cleanly. Thanks Matt for that input

nirmoy and others added 7 commits January 9, 2026 07:18
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Revert "gpio: tegra186: Add support for Tegra410"
d53184f 
This reverts commit 5443ed9.

Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
Revert "gpio: tegra186: Use generic macro for port definitions"
65ed7b6 
This reverts commit 32b89e4.
This is partial commit of f75db6f so revert it to cherry-pick
the full original commit.

Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
dt-bindings: gpio: Add Tegra256 support
ab483eb 
Extend the existing Tegra186 GPIO controller device tree bindings with
support for the GPIO controller found on Tegra256. The number of pins is
slightly different, but the programming model remains the same

Add a new header, include/dt-bindings/gpio/tegra256-gpio.h,
that defines port IDs as well as the TEGRA256_MAIN_GPIO() helper,
both of which are used in conjunction to create a unique specifier
for each pin. The OS can reconstruct the port ID and pin from
these values to determine the register region for the corresponding
GPIO. However, the OS does not use the macro definitions in this file.

The symbolic names help associate these GPIO specifiers with the names
used in the technical documentation available for the chip.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250823055420.24664-1-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
(cherry picked from commit eef6dcb)
Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
gpio: tegra186: Add support for Tegra256
53d8f14 
Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra256. While the programming model remains
the same, the number of pins has slightly changed.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/r/20250823055420.24664-2-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
(cherry picked from commit db12ee0)
Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
gpio: tegra186: Use generic macro for port definitions
0d506ea 
Introduce a generic macro TEGRA_GPIO_PORT to define SoC specific
ports macros. This simplifies the code and avoids unnecessary
duplication.

Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
(cherry picked from commit f75db6f)
Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
gpio: tegra186: Add support for Tegra410
569a04e 
Extend the existing Tegra186 GPIO controller driver with support for
the GPIO controller found on Tegra410. Tegra410 supports two GPIO
controllers referred to as 'COMPUTE' and 'SYSTEM'.

Co-developed-by: Nathan Hartman <nhartman@nvidia.com>
Signed-off-by: Nathan Hartman <nhartman@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
(cherry picked from commit 9631a10)
Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
@nirmoy
gpio: tegra186: Fix GPIO name collisions for Tegra410
fcfde1e 
On Tegra410, Compute and System GPIOs have same port names. This
results in the same GPIO names for both Compute and System GPIOs
during initialization in `tegra186_gpio_probe()`, which results in
following warnings:

  kernel: gpio gpiochip1: Detected name collision for GPIO name 'PA.00'
  kernel: gpio gpiochip1: Detected name collision for GPIO name 'PA.01'
  kernel: gpio gpiochip1: Detected name collision for GPIO name 'PA.02'
  kernel: gpio gpiochip1: Detected name collision for GPIO name 'PB.00'
  kernel: gpio gpiochip1: Detected name collision for GPIO name 'PB.01'
  ...

Add GPIO name prefix in the SoC data and use it to initialize the GPIO
name.

Port names remain unchanged for previous SoCs. On Tegra410, Compute
GPIOs are named COMPUTE-P<PORT>.GPIO, and System GPIOs are named
SYSTEM-P<PORT>.GPIO.

Fixes: 9631a10 ("gpio: tegra186: Add support for Tegra410")
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20251113163112.885900-1-kkartik@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
(cherry picked from commit 67f9b82)
Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
nvmochs
nvmochs approved these changes Jan 9, 2026
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Thanks Nirmoy for fixing this up so we can pick clean.

✅ Commit fcfde1e matches upstream exactly
✅ Commit 569a04e matches upstream exactly
✅ Commit 0d506ea matches upstream exactly
✅ Commit 53d8f14 matches upstream exactly
✅ Commit ab483eb matches upstream exactly

Acked-by: Matthew R. Ochs <mochs@nvidia.com>

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clsotog commented Jan 9, 2026

Acked-by: Carol L Soto <csoto@nvidia.com>

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jamieNguyenNVIDIA commented Jan 9, 2026

Acked-by: Jamie Nguyen <jamien@nvidia.com>

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@clsotog clsotog clsotog approved these changes

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