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🌱 Advanced VLSI Design and Verification Trainee at
Maven Silicon VLSI Training Centre, Bengaluru and
B.Tech ECE 2023 passed out from K L University, Vijayawada -
🌱 Currently Working on RISC-V RV32I Multi-Stage Pipeline processor RTL Design Project
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🌱 Know about my experiences on CV / RESUME https://github.com/MVS116/MohanVamsiDevalrajuResume
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🌱 Learning RISC-V processor RTL Design, Communication Interfaces and Bus Protocols, Linux, Data Structures and Algorithms using C++, Computer Organization and Architecture,
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Aspiring to excel in semiconductor industry, Determined to apply my skills and hands-on project experience in VLSI Digital Design and Verification. ,
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👨💻 All of my projects are available at [https://github.com/MVS116?tab=repositories])
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📝 I am Active on LinkedIn https://www.linkedin.com/in/mohan-vamsi-seetharam-devalraju/
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💬 Ask me about Physics, ASIC/ FPGA/ SOC, C, C++, Verilog, SystemVerilog, UVM, IOT, VLSI
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📫 How to reach me mohanvamsidevalraju@gmail.com or contact +91-6301270276
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⚡ Fun fact ,
