Skip to content

KLayout PyCells: Segmented resistor array features #671

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Open
martinjankoehler wants to merge 25 commits into
base: dev
Choose a base branch
from
Open

KLayout PyCells: Segmented resistor array features #671

martinjankoehler wants to merge 25 commits into from

Conversation

@martinjankoehler
Copy link
Contributor

@martinjankoehler martinjankoehler commented Sep 2, 2025 •
edited
Loading

NOTE: depends on #670, please merge / review this one first, then rebase

Features

  • existing resistor cells have additional parameters:
    • number of segments
    • segmented connection: serial / parallel / no
  • Tests pass
  • Appropriate changes to README are included in PR

@martinjankoehler martinjankoehler changed the title Segmented rResistor array pycell Segmented resistor array features for KLayout PyCell Sep 2, 2025
@martinjankoehler martinjankoehler changed the title Segmented resistor array features for KLayout PyCell KLayout PyCells: Segmented resistor array features Sep 2, 2025
martinjankoehler and others added 24 commits October 1, 2025 15:00
@martinjankoehler
Add guard_ring PyCell
8e4e7d4 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Respect min nBuLay width design rule
09f45c1 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Increased default guard ring size to make it work with dnwell
7ecb35f 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
KLayout PyCells: add base class for devices, allows guard ring around…
9e15a96 
… cell

Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
[Gardening] Fixed typos, redundant semicolon
699a60f 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Fixup guard ring code
48d3477 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
KLayout PyCells: derive guard ring relevant devices from DeviceBase
b3c335e 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
FIXME: Add warning about bug in pycell4klayout-api
f730a89 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
guard_ring_code: Add missing import
f8deb47 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
guard_ring: fixed nwell / psub area (full rect instead of ring)
4b299b5 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Minimal ring width for Active
23dd9c9 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Remove pin, remove TIE label, add sub! text
11d9df5 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Guard Rings: Remove DNWELL type
bd92154 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Text sub! for nmos and well for pmos
451dc4e 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Guard ring PCell: create contacts with fixed contact width / space, a…
808a89f 
…nd gap in the middle of the array

Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Fixed ring drawing code (left/right part overlap)
a862563 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Only use one text for sub! / nwell
2af7789 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Add nBuLay ring
202c2e0 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@p-fath @martinjankoehler
ptap and ntap with guard ring added
6853ce9 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
KLayout PyCells: Added base class for resistors to support segment ar…
8c13013 
…rays

Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
KLayout PyCells: rppd cell adopts ResistorBase, thus arraying
dcbe374 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>

# Conflicts:
#	ihp-sg13g2/libs.tech/klayout/python/sg13g2_pycell_lib/ihp/rppd_code.py
@martinjankoehler
KLayout PyCells: rsil cell adopts ResistorBase, thus arraying
dff87ab 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
KLayout PyCells: rhigh cell adopts ResistorBase, thus arraying
16481e9 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Adopt ResistorBase to work with guard-ring-pycells branch
2832ab2 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
@martinjankoehler
Copy link
Contributor Author

martinjankoehler commented Oct 1, 2025

@KrzysztofHerman @sergeiandreyev now Signed off

@martinjankoehler martinjankoehler mentioned this pull request Oct 2, 2025
Open
@martinjankoehler
Fix: nBuLay must be inside NWell
2149e61 
Signed-off-by: Martin Jan Köhler <info@martinjankoehler.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

@KrzysztofHerman KrzysztofHerman Awaiting requested review from KrzysztofHerman KrzysztofHerman is a code owner

@sergeiandreyev sergeiandreyev Awaiting requested review from sergeiandreyev sergeiandreyev is a code owner

Assignees

No one assigned

Labels

None yet

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

2 participants

@martinjankoehler @p-fath