Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "distaff"
version = "0.5.1"
version = "0.6.0"
authors = ["Bobbin Threadbare <bobbinth@protonmail.com>"]
edition = "2018"
description="Zero-knowledge virtual machine written in Rust"
Expand All @@ -19,11 +19,11 @@ harness = false
[dependencies]
hex = "0.4.2"
rand = "0.7.3"
blake3 = "0.3.5"
blake3 = "0.3.6"
sha3 = "0.8.2"
crossbeam-utils = "0.7.2"
bincode = "1.3.1"
serde = { version = "1.0.114", features = ["derive"] }
serde = { version = "1.0.115", features = ["derive"] }
log = "0.4.11"
env_logger = "0.7.1"

Expand Down
21 changes: 9 additions & 12 deletions src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -109,23 +109,20 @@ const HACC_NUM_ROUNDS : usize = 14;
// DECODER LAYOUT
// ------------------------------------------------------------------------------------------------
//
// ctr ╒═════ sponge ══════╕╒═══ cf_ops ══╕╒═══════ ld_ops ═══════╕╒═ hd_ops ╕╒═ ctx ══╕╒═ loop ═╕
// 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 .. .. ..
// ├────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────
// ctr ╒═════ sponge ══════╕╒═ flow_ops ══╕╒═════════ user_ops ═════════╕╒═ ctx ══╕╒═ loop ═╕
// 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 .. .. ..
// ├────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┤

const NUM_CF_OP_BITS : usize = 3;
const NUM_LD_OP_BITS : usize = 5;
const NUM_HD_OP_BITS : usize = 2;
const NUM_FLOW_OP_BITS : usize = 3;
const NUM_USER_OP_BITS : usize = 6;

const NUM_CF_OPS : usize = 8;
const NUM_LD_OPS : usize = 32;
const NUM_HD_OPS : usize = 4;
const NUM_FLOW_OPS : usize = 8;
const NUM_USER_OPS : usize = 36;

const OP_COUNTER_IDX : usize = 0;
const SPONGE_RANGE : Range<usize> = Range { start: 1, end: 5 };
const CF_OP_BITS_RANGE : Range<usize> = Range { start: 5, end: 8 };
const LD_OP_BITS_RANGE : Range<usize> = Range { start: 8, end: 13 };
const HD_OP_BITS_RANGE : Range<usize> = Range { start: 13, end: 15 };
const FLOW_OP_BITS_RANGE : Range<usize> = Range { start: 5, end: 8 };
const USER_OP_BITS_RANGE : Range<usize> = Range { start: 8, end: 14 };

// STACK LAYOUT
// ------------------------------------------------------------------------------------------------
Expand Down
54 changes: 20 additions & 34 deletions src/processor/decoder/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ use crate::{
math::field,
utils::sponge,
MAX_CONTEXT_DEPTH, MAX_LOOP_DEPTH,
NUM_CF_OP_BITS, NUM_LD_OP_BITS, NUM_HD_OP_BITS,
NUM_FLOW_OP_BITS, NUM_USER_OP_BITS,
SPONGE_WIDTH, BASE_CYCLE_LENGTH, PUSH_OP_ALIGNMENT,
};
use super::opcodes::{ FlowOps, UserOps };
Expand All @@ -20,9 +20,8 @@ pub struct Decoder {
sponge_trace: [Vec<u128>; SPONGE_WIDTH],
sponge : [u128; SPONGE_WIDTH],

cf_op_bits : [Vec<u128>; NUM_CF_OP_BITS],
ld_op_bits : [Vec<u128>; NUM_LD_OP_BITS],
hd_op_bits : [Vec<u128>; NUM_HD_OP_BITS],
flow_op_bits: [Vec<u128>; NUM_FLOW_OP_BITS],
user_op_bits: [Vec<u128>; NUM_USER_OP_BITS],

ctx_stack : Vec<Vec<u128>>,
ctx_depth : usize,
Expand All @@ -49,16 +48,13 @@ impl Decoder {
let sponge = [field::ZERO; SPONGE_WIDTH];

// initialize op_bits registers
let cf_op_bits = [
let flow_op_bits = [
vec![field::ZERO; init_trace_length], vec![field::ZERO; init_trace_length],
vec![field::ZERO; init_trace_length]
];
let ld_op_bits = [
let user_op_bits = [
vec![field::ZERO; init_trace_length], vec![field::ZERO; init_trace_length],
vec![field::ZERO; init_trace_length], vec![field::ZERO; init_trace_length],
vec![field::ZERO; init_trace_length]
];
let hd_op_bits = [
vec![field::ZERO; init_trace_length], vec![field::ZERO; init_trace_length]
];

Expand All @@ -73,7 +69,7 @@ impl Decoder {
return Decoder {
step: 0,
op_counter, sponge, sponge_trace,
cf_op_bits, ld_op_bits, hd_op_bits,
flow_op_bits, user_op_bits,
ctx_stack, ctx_depth, loop_stack, loop_depth,
};
}
Expand Down Expand Up @@ -107,9 +103,8 @@ impl Decoder {

state.push(self.op_counter[step]);
for register in self.sponge_trace.iter() { state.push(register[step]); }
for register in self.cf_op_bits.iter() { state.push(register[step]); }
for register in self.ld_op_bits.iter() { state.push(register[step]); }
for register in self.hd_op_bits.iter() { state.push(register[step]); }
for register in self.flow_op_bits.iter() { state.push(register[step]); }
for register in self.user_op_bits.iter() { state.push(register[step]); }
for register in self.ctx_stack.iter() { state.push(register[step]); }
for register in self.loop_stack.iter() { state.push(register[step]); }

Expand All @@ -128,21 +123,18 @@ impl Decoder {
registers.push(r2);
registers.push(r3);

let [r0, r1, r2] = self.cf_op_bits;
let [r0, r1, r2] = self.flow_op_bits;
registers.push(r0);
registers.push(r1);
registers.push(r2);

let [r0, r1, r2, r3, r4] = self.ld_op_bits;
let [r0, r1, r2, r3, r4, r5] = self.user_op_bits;
registers.push(r0);
registers.push(r1);
registers.push(r2);
registers.push(r3);
registers.push(r4);

let [r0, r1] = self.hd_op_bits;
registers.push(r0);
registers.push(r1);
registers.push(r5);

// for context stack, first get rid of the outer-most context because it is always 0
self.ctx_stack.pop();
Expand Down Expand Up @@ -255,10 +247,9 @@ impl Decoder {
let last_op_count = self.op_counter[self.step];
fill_register(&mut self.op_counter, self.step + 1, last_op_count);

// set all bit registers to 1 to indicate NOOP operation
for register in self.cf_op_bits.iter_mut() { fill_register(register, self.step, field::ONE); }
for register in self.ld_op_bits.iter_mut() { fill_register(register, self.step, field::ONE); }
for register in self.hd_op_bits.iter_mut() { fill_register(register, self.step, field::ONE); }
// set all bit registers to 0 to indicate NOOP operation
for register in self.flow_op_bits.iter_mut() { fill_register(register, self.step, field::ONE); }
for register in self.user_op_bits.iter_mut() { fill_register(register, self.step, field::ZERO); }

// for sponge and stack registers, just copy the value of the last state of the register
for register in self.sponge_trace.iter_mut() { fill_register(register, self.step + 1, register[self.step]); }
Expand All @@ -283,9 +274,8 @@ impl Decoder {

self.op_counter.resize(new_length, field::ZERO);
for register in self.sponge_trace.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.cf_op_bits.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.ld_op_bits.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.hd_op_bits.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.flow_op_bits.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.user_op_bits.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.ctx_stack.iter_mut() { register.resize(new_length, field::ZERO); }
for register in self.loop_stack.iter_mut() { register.resize(new_length, field::ZERO); }
}
Expand All @@ -306,17 +296,13 @@ impl Decoder {
let step = self.step - 1;

let flow_op = flow_op as u8;
for i in 0..NUM_CF_OP_BITS {
self.cf_op_bits[i][step] = ((flow_op >> i) & 1) as u128;
for i in 0..NUM_FLOW_OP_BITS {
self.flow_op_bits[i][step] = ((flow_op >> i) & 1) as u128;
}

let user_op = user_op as u8;
for i in 0..NUM_LD_OP_BITS {
self.ld_op_bits[i][step] = ((user_op >> i) & 1) as u128;
}

for i in 0..NUM_HD_OP_BITS {
self.hd_op_bits[i][step] = ((user_op >> (i + NUM_LD_OP_BITS)) & 1) as u128;
for i in 0..NUM_USER_OP_BITS {
self.user_op_bits[i][step] = ((user_op >> i) & 1) as u128;
}
}

Expand Down
50 changes: 21 additions & 29 deletions src/processor/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -196,15 +196,14 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(64, trace_length);
assert_eq!(17, trace.len());
assert_eq!(16, trace.len());
let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(46, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([7, 15, 0, 0, 0, 0, 0, 0], state.user_stack());
}
Expand All @@ -218,17 +217,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(64, trace_length);
assert_eq!(18, trace.len());
assert_eq!(17, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(60, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.loop_stack());
assert_eq!([7, 15, 0, 0, 0, 0, 0, 0], state.user_stack());
}
Expand All @@ -244,16 +241,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(128, trace_length);
assert_eq!(19, trace.len());
assert_eq!(18, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(76, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0], state.loop_stack());
assert_eq!([24, 0, 0, 0, 0, 0, 0, 0], state.user_stack());
Expand All @@ -264,16 +260,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(128, trace_length);
assert_eq!(19, trace.len());
assert_eq!(18, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(92, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0], state.loop_stack());
assert_eq!([96, 3, 0, 0, 0, 0, 0, 0], state.user_stack());
Expand All @@ -290,16 +285,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(64, trace_length);
assert_eq!(18, trace.len());
assert_eq!(17, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(60, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0], state.loop_stack());
assert_eq!([15, 0, 0, 0, 0, 0, 0, 0], state.user_stack());
Expand All @@ -310,16 +304,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(128, trace_length);
assert_eq!(19, trace.len());
assert_eq!(18, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(75, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0], state.loop_stack());
assert_eq!([225, 0, 0, 0, 0, 0, 0, 0], state.user_stack());
Expand All @@ -330,16 +323,15 @@ mod tests {
let trace_length = trace[0].len();

assert_eq!(256, trace_length);
assert_eq!(19, trace.len());
assert_eq!(18, trace.len());

let mut state = build_trace_state(trace.len(), ctx_depth, loop_depth) ;
state.update_from_trace(&trace, trace_length - 1);

assert_eq!(135, state.op_counter());
assert_eq!(program.hash(), as_bytes(state.program_hash()));
assert_eq!([1, 1, 1], state.cf_op_bits());
assert_eq!([1, 1, 1, 1, 1], state.ld_op_bits());
assert_eq!([1, 1], state.hd_op_bits());
assert_eq!([0, 0, 0], state.flow_op_bits());
assert_eq!([0, 0, 0, 0, 0, 0], state.user_op_bits());
assert_eq!([0], state.ctx_stack());
assert_eq!([0], state.loop_stack());
assert_eq!([43143988327398919500410556793212890625, 0, 0, 0, 0, 0, 0, 0], state.user_stack());
Expand Down
Loading