Skip to content
View DanushVikraman007's full-sized avatar

Block or report DanushVikraman007

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. implementation-of-non-Hermitian-system implementation-of-non-Hermitian-system Public

    Here we implement a research paper for quantum computing (Non Hermitian system)

    Python 1

  2. Capstone_share Capstone_share Public

    Jupyter Notebook

  3. Rock-paper-scissors-python Rock-paper-scissors-python Public

    A simple code where the app opens camera and detects the hand signs as rock/paper/scissor and you play against the cpu

    Python

  4. Vedic-multiplier Vedic-multiplier Public

    Built with system verilog uses basic 4 bit carry look aheadd adder to build 8 bit adder which inturn was used to build 12 bit adder also includes version wit normal 8 bit adder these adders are us…

    SystemVerilog

  5. single-stage-RISC-V-processor single-stage-RISC-V-processor Public

    SystemVerilog 1 1

  6. CTC_app CTC_app Public

    Python 1